IDT5V925 Datasheet, PDF (1/7 Pages) Integrated Device Technology – PROGRAMMABLE CLOCK GENERATOR

IDT5V925
PROGRAMMABLE CLOCK GENERATOR
PROGRAMMABLE
CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
IDT5V925
FEATURES:
• 3V to 3.6V operating voltage
• 3.125 MHz to 160MHz output frequency range
• 4 programmable frequency outputs
• Input from fundamental crystal oscillator or external source
• Balanced Drive Outputs ±12mA
• PLL disable mode for low frequency testing
• Select inputs (S[1:0]) for divide selection (multiply ratio of 2,
3, 4, 5, 6, 7, and 8)
• 5V tolerant inputs
• Low output skew/jitter
• External PLL feedback, internal loop filter
• Available in 16-pin QSOP package
APPLICATIONS:
• Ethernet/fast ethernet
• Router
• Network switches
• SAN
• Instrumentation
DESCRIPTION:
The IDT5V925 is a high-performance, low skew, low jitter phase-locked
loop (PLL) clock driver. It provides precise phase and frequency alignment
of its clock outputs to an externally applied clock input or internal crystal
oscillator. The IDT5V925 has been specially designed to interface with
Gigabit Ethernet and Fast Ethernet applications by providing a 125MHz
clock from 25MHz input. It can also be programmed to provide output
frequencies ranging from 3.125MHz to 160MHz with input frequencies
ranging from 3.125MHz to 80MHz.
The IDT5V925 includes an internal RC filter that provides excellent jitter
characteristics and eliminates the need for external components. When
using the optional crystal input, the chip accepts a 10-30MHz fundamental
mode crystal with a maximum equivalent series resistance of 50Ω. The on-
chip crystal oscillator includes the feedback resistor and crystal capacitors
(nominal load capacitance is 15pF).
FUNCTIONAL BLOCK DIAGRAM
S0 S1
SELECT
MODE
FB
PHASE
LOOP
CLKIN
DETECTOR
FILTER
VCO
0
VCO
DIVIDE
Q /N
1
1/N
X2
Q0
XTAL
X1
OSC
Q1
OPTIONAL
CRYSTAL
Q2
OE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
c
2004 Integrated Device Technology, Inc.
SEPTEMBER 2002
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