IDT5T9050 Datasheet, PDF (1/7 Pages) Integrated Device Technology – 2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER™ JR

IDT5T9050
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER JR.
2.5V SINGLE DATA RATE
1:5 CLOCK BUFFER
TERABUFFER™ JR.
INDUSTRIAL TEMPERATURE RANGE
IDT5T9050
FEATURES:
• Optimized for 2.5V LVTTL
• Guaranteed Low Skew < 25ps (max)
• Very low duty cycle distortion < 300 (max)
• High speed propagation delay < 1.8ns. (max)
• Up to 200MHz operation
• Very low CMOS power levels
• Hot insertable and over-voltage tolerant inputs
• 1:5 fanout buffer
• 2.5V VDD
• Available in TSSOP package
DESCRIPTION:
The IDT5T9050 2.5V single data rate (SDR) clock buffer is a single-ended
input to five single-ended outputs buffer built on advanced metal CMOS
technology. The SDR clock buffer fanout from a single input to five single-ended
outputs reduces the loading on the preceding driver and provides an efficient
clock distribution network. Multiple power and grounds reduce noise.
APPLICATIONS:
• Clock and signal distribution
FUNCTIONAL BLOCK DIAGRAM
GL
G
OUTPUT
CONTROL
Q1
OUTPUT
CONTROL
Q2
A
OUTPUT
CONTROL
Q3
OUTPUT
CONTROL
Q4
OUTPUT
CONTROL
Q5
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2002 Integrated Device Technology, Inc.
OCTOBER 2002
DSC-5958/17