IDT2308B Datasheet, PDF (1/13 Pages) Integrated Device Technology – 3.3V ZERO DELAY CLOCK MULTIPLIER

IDT2308B
3.3V ZERO DELAY CLOCK MULTIPLIER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
3.3V ZERO DELAY
CLOCK MULTIPLIER
IDT2308B
FEATURES:
• Phase-Lock Loop Clock Distribution for Applications ranging
from 10MHz to 133MHz operating frequency
• Distributes one clock input to two banks of four outputs
• Separate output enable for each output bank
• External feedback (FBK) pin is used to synchronize the outputs
to the clock input
• Output Skew <200 ps
• Low jitter <200 ps cycle-to-cycle
• 1x, 2x, 4x output options (see table):
– IDT2308B-1 1x
– IDT2308B-2 1x, 2x
– IDT2308B-3 2x, 4x
– IDT2308B-4 2x
– IDT2308B-1H, -2H, and -5H for High Drive
• No external RC network required
• Operates at 3.3V VDD
• Available in SOIC and TSSOP packages
DESCRIPTION:
The IDT2308B is a high-speed phase-lock loop (PLL) clock multiplier. It is
designed to address high-speed clock distribution and multiplication applica-
tions. The zero delay is achieved by aligning the phase between the incoming
clock and the output clock, operable within the range of 10 to 133MHz.
The IDT2308B has two banks of four outputs each that are controlled via two
select addresses. By proper selection of input addresses, both banks can be
put in tri-state mode. In test mode, the PLL is turned off, and the input clock
directly drives the outputs for system testing purposes. In the absence of an
input clock, the IDT2308B enters power down, and the outputs are tri-stated.
In this mode, the device will draw less than 25µA.
The IDT2308B is available in six unique configurations for both pre-
scaling and multiplication of the Input REF Clock. (See available options
table.)
The PLL is closed externally to provide more flexibility by allowing the user
to control the delay between the input clock and the outputs.
The IDT2308B is characterized for both Industrial and Commercial opera-
tion.
FUNCTIONAL BLOCK DIAGRAM
(-3, -4)
16
FBK
2
1
PLL
REF
2
(-5)
2
CLKA1
3
CLKA2
14
CLKA3
15
CLKA4
S2 ⁸
S1 ⁹
Control
Logic
(-2, -3) 2
6
7
10
11
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
c 2010 Integrated Device Technology, Inc.
CLKB1
CLKB2
CLKB3
CLKB4
MAY 2010
DSC 6995/3