ICS501MILFT Datasheet, PDF (1/9 Pages) Integrated Device Technology – LOCO PLL CLOCK MULTIPLIER

LOCO™ PLL CLOCK MULTIPLIER
DATASHEET
ICS501
Description
The ICS501 LOCO^TM is the most cost effective way to
generate a high-quality, high-frequency clock output from a
lower frequency crystal or clock input. The name LOCO
stands for Low Cost Oscillator, as it is designed to replace
crystal oscillators in most electronic systems. Using
Phase-Locked Loop (PLL) techniques, the device uses a
standard fundamental mode, inexpensive crystal to
produce output clocks up to 160 MHz.
Stored in the chip’s ROM is the ability to generate nine
different multiplication factors, allowing one chip to output
many common frequencies (see table on page 2).
The device also has an output enable pin which tri-states
the clock output when the OE pin is taken low.
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined or guaranteed. For
applications which require defined input to output skew, use
the ICS570B.
Block Diagram
Features
• Packaged as 8-pin SOIC, MSOP, or die
• RoHS 5 (green) or RoHS 6 (green and lead free)
compliant packaging
• IDT’s lowest cost PLL clock
• Zero ppm multiplication error
• Input crystal frequency of 5 - 27 MHz
• Input clock frequency of 2 - 50 MHz
• Output clock frequencies up to 160 MHz
• Extremely low jitter of 25 ps (one sigma)
• Compatible with all popular CPUs
• Duty cycle of 45/55 up to 160 MHz
• Nine selectable frequencies
• Operating voltage of 3.3 V or 5.0 V
• Tri-state output for board level testing
• 25 mA drive capability at TTL levels
• Ideal for oscillator replacement
• Industrial temperature version available
• Advanced, low-power CMOS process
VDD
S1:0 ²
Crystal or
Clock input
X1/ICLK
X2
Crystal
O s c illa to r
Optional crystal capacitors
PLL Clock
M u ltip lie r
Circuitry
and ROM
GND
OE
CLK
IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER
1
ICS501
REV R 051310