9ZXL1251_16 Datasheet, PDF (1/20 Pages) Integrated Device Technology – 12-output DB1200ZL Derivative with Integrated 85ohm Terminations

12-output DB1200ZL Derivative with
Integrated 85Ω Terminations
9ZXL1251
DATASHEET
General Description
The 9ZXL1251 meets the demanding requirements of the
Intel DB1200ZL specification, including the critical low-drift
requirements of Intel CPUs. It is pin compatible to the
9ZXL1231 and integrates 24 termination resistors, saving
41mm² board area.
Recommended Application
Buffer for Romley, Grantley and Purley Servers, solid state
storage and PCIe
Output Features
• 12 LP-HCSL Output Pairs w/integrated terminations (Zo =
85Ω)
Key Specifications
• Cycle-to-cycle jitter <50ps
• Output-to-output skew <50ps
• Input-to-output delay variation <50ps
• PCIe Gen3 phase jitter <1.0ps RMS
• Phase jitter: QPI/UPI >=9.6GB/s <0.2ps rms
Features/Benefits
• 85Ω Low-power push-pull HCSL outputs; eliminate 24
resistors, save 41mm² of area
• Pin compatible to 9ZX21201 and 9ZXL1231; easy path to
power and area savings
• Space-saving 64-pin VFQFPN package
• Fixed feedback path for 0ps input-to-output delay
• 9 Selectable SMBus Addresses; multiple devices can
share the same SMBus Segment
• 12 OE# pins; hardware control of each output
• PLL or bypass mode; supports common and separate clock
architectures
• Selectable PLL bandwidth; minimizes jitter peaking in
downstream PLL's
• Spread Spectrum Compatible; tracks spreading input clock
for low EMI
• -40°C to +85°C device available; supports demanding
environmental applications
Block Diagram
OE(11:0)#
DIF_IN
DIF_IN#
Z-PLL
(SS Compatible)
DFB_OUT_NC
DIF(11:0)
HIBW_BYPM_LOBW#
100M_133M#
CKPWRGD/PD#
SMB_A0_tri
SMB_A1_tri
SMBDAT
SMBCLK
Logic
9ZXL1251 REVISION B 11/20/15
1
©2015 Integrated Device Technology, Inc.