9ZXL0651 Datasheet, PDF (1/17 Pages) Integrated Device Technology – PLL or bypass mode

6-OUTPUT LOW-POWER HCSL BUFFER FOR PCIE GEN1-2-3 AND QPI
DATASHEET
9ZXL0651
General Description
The 9ZXL0651 is a low-power 6-output differential buffer
that meets all the performance requirements of the Intel
DB1200Z specification. It consumes 50% less power than
standard HCSL devices and has internal terminations to
allow direct connection to 85 ohm transmission lines. The
9ZXL0651 is backwards compatible to PCIe Gen1 and
Gen2 and QPI 6.4GT/s specifications. A fixed, internal
feedback path maintains low drift for critical QPI
applications.
Recommended Application
6-Output Low-Power HCSL Buffer for PCIe Gen1-2-3 and
QPI
Output Features
• 6 - 0.7V low-power HCSL (LP-HCSL) output pairs
w/integrated terminations
Block Diagram
Features/Benefits
• Low-Power-HCSL outputs w/Zo = 85; save power and
board space - no termination resistors required. Ideal for
blade servers.
• Space-saving 40-pin VFQFPN package
• Fixed feedback path for 0ps input-to-output delay
• 6 OE# pins; Hardware control of each output
• PLL or bypass mode; PLL can dejitter incoming clock
• Selectable PLL bandwidth; minimizes jitter peaking in
downstream PLL's
• Spread Spectrum Compatible; tracks spreading input
clock for low EMI
Key Specifications
• Cycle-to-cycle jitter <50ps
• Output-to-output skew <65 ps
• Input-to-output delay variation <50ps
• PCIe Gen3 phase jitter <1.0ps RMS
• QPI 9.6GT/s 12UI phase jitter <0.2ps RMS
OE(5:0)#
DIF_IN
DIF_IN#
HIBW_BYPM_LOBW#
CKPWRGD/PD#
SMBDAT
SMBCLK
Logic
Z-PLL
(SS Compatible)
DFB_OUT_NC
DIF(5:0)
IDT® 6-OUTPUT LOW-POWER HCSL BUFFER FOR PCIE GEN1-2-3 AND QPI
1
9ZXL0651
REV C 040115