9ZX21901C_15 Datasheet, PDF (1/20 Pages) Integrated Device Technology – 19-Output Differential Zbuffer for PCIe Gen2/3 and QPI

19-Output Differential Zbuffer for PCIe Gen2/3
and QPI
9ZX21901C
DATASHEET
General Description
The 9ZX21901 is Intel DB1900Z Differential Buffer suitable for
PCI-Express Gen3 or QPI applications. The part is backwards
compatible to PCIe Gen1 and Gen2. A fixed external feedback
maintains low drift for critical QPI applications. In bypass
mode, the 9ZX21901 can provide outputs up to 400MHz.
Recommended Application
• 19-output PCIe Gen3/QPI buffer with fixed feedback for
Romley platforms
Output Features
• 19 – 0.7V current mode differential HCSL output pairs
Key Specifications
• Cycle-to-cycle jitter: < 50ps
• Output-to-output skew: <65ps
• Input-to-output delay: Fixed at 0 ps
• Input-to-output delay variation: <50ps
• Phase jitter: PCIe Gen3 < 1ps rms
• Phase jitter: QPI 9.6GB/s < 0.2ps rms
Features/Benefits
• Fixed feedback path/ 0ps input-to-output delay
• 9 Selectable SMBus addresses; Multiple devices can share
same SMBus segment
• 8 dedicated OE# pins; hardware control of outputs
• PLL or bypass mode; PLL can dejitter incoming clock
• Selectable PLL BW; minimizes jitter peaking in downstream
PLL's
• Spread spectrum compatible; tracks spreading input clock
for EMI reduction
• SMBus Interface; unused outputs can be disabled
• 100MHz & 133.33MHz PLL mode; legacy QPI support
• Undriven differential outputs in Power Down mode for
maximum power savings
Functional Block Diagram
OE(12:5)#
8
DIF_IN
DIF_IN#
Z-PLL
(SS
Compatible)
Bypass path
HIBW_BYPM_LOBW#
100M_133M#
CKPWRGD/PD#
SMB_A0_tri
SMB_A1_tri
SMBDAT
SMBCLK
Logic
Note: Even though the feedback is fixed, DFB_OUT still
needs a termination network for the part to function.
9ZX21901C REVISION N 11/19/15
1
DFB_OUT
DIF(18:0)
IREF
©2015 Integrated Device Technology, Inc.