9ZX21901B_15 Datasheet, PDF (1/18 Pages) Integrated Device Technology – 19-Output Differential Zbuffer for PCIe Gen2/3 and QPI

DATASHEET
19-Output Differential Zbuffer for PCIe Gen2/3 and QPI
9ZX21901B
Description
Features/Benefits
The 9ZX21901 is a version of the Intel DB1900Z Differential Buffer •
with an ajdustable external feedback path allowing the user to
eliminate trace delays from their design. It is suitable for PCIe Gen3
•
or QPI applications. The part is backwards compatible to PCIe
Gen1 and Gen2. The device maintains low drift for critical QPI ^•
applications. In bypass mode, the IDT9ZX21901 can provide outputs _•
up to 400MHz.
•
Recommended Application
19 output PCIe Gen3/QPI buffer with adjustable feedback for Romley ^•
platforms
•
Output Features
•
• 19 - 0.7V current mode differential HCSL output pairs
•
External feedback path; Adjustable input-to-output delay
9 Selectable SMBus addresses/ Multiple devices can
share same SMBus segment
8 dedicated OE# pins/ hardware control of outputs
PLL or bypass mode/ PLL can dejitter incoming clock
Selectable PLL BW/ minimizes jitter peaking in
downstream PLL's
Spread spectrum compatible/tracks spreading input clock
for EMI reduction
SMBus Interface/ unused outputs can be disabled
100MHz & 133.33MHz PLL mode/ Legacy QPI support
Undriven differential outputs in Power Down mode for
maximum power savings
Key Specifications
• Cycle-to-cycle jitter: < 50ps
• Output-to-output skew: <65ps
• Input-to-output delay: User adjustable
• Input-to-output delay variation: <50ps
• Phase jitter: PCIe Gen3 < 1ps rms
Functional Block Diagram
• Phase jitter: QPI 9.6GB/s < 0.2ps rms
8
OE(5_12)#
DIF_IN
DIF_IN#
DFB_IN
DFB_IN#
HIBW_BYPM_LOBW#
100M_133M#
CKPWRGD/PD#
SMB_A0_tri
SMB_A1_tri
SMBDAT
SMBCLK
Logic
Z-PLL
(SS Compatible)
DFB_OUT
DIF(18:0)
IREF
IDT^® 19-Output Differential Zbuffer for PCIe Gen2/3 and QPI
1
1586P - 11/19/15