9ZX21200 Datasheet, PDF (1/17 Pages) Integrated Device Technology – Space-saving 56-pin package

12-OUTPUT DIFFERENTIAL Z-BUFFER FOR PCIE GEN3 AND QPI
DATASHEET
9ZX21200
Description
The 9ZX21200 is a small-footprint 12-output differential
buffer that meets all the performance requirements of the
Intel DB1200Z specification. The 9ZX21200 is backwards
compatible to PCIe Gen1 and Gen2 applications. A fixed,
internal feedback path maintains low drift for critical QPI
applications. In bypass mode, the 9ZX21200 can provide
outputs up to 150MHz.
Recommended Application
12-output PCIe Gen3/ QPI differential buffer for Romley and
newer platforms
Key Specifications
• Cycle-to-cycle jitter <50ps
• Output-to-output skew < 65 ps
• Input-to-output delay variation <50ps
• PCIe Gen3 phase jitter < 1.0ps RMS
• QPI 9.6GT/s 12UI phase jitter < 0.2ps RMS
Features/Benefits
• Space-saving 56-pin package
• Fixed feedback path for 0ps input-to-output delay
• 9 Selectable SMBus Addresses; Mulitple devices can
share the same SMBus Segment
• 4 OE# pins; Hardware control of four outputs
• PLL or bypass mode; PLL can dejitter incoming clock
• 100MHz or 133MHz PLL mode operation; supports PCIe
and QPI applications
• Selectable PLL bandwidth; minimizes jitter peaking in
downstream PLL's
• Spread Spectrum Compatible; tracks spreading input
clock for low EMI
• Software control of PLL Bandwidth and Bypass
Settings/PLL can dejitter incoming clock (B Rev only)
Output Features
• 12 - 0.7V differential HCSL output pairs
Block Diagram
OE(8,6,4,2)#
DIF_IN
DIF_IN#
Z-PLL
(SS Compatible)
DFB_OUT
DIF(11:0)
HIBW_BYPM_LOBW#
100M_133M#
CKPWRGD/PD#
SMB_A0_tri
SMB_A1_tri
SMBDAT
SMBCLK
Logic
IREF
IDT® 12-OUTPUT DIFFERENTIAL Z-BUFFER FOR PCIE GEN3 AND QPI
1
9ZX21200
REV D 041513