95V857 Datasheet, PDF (1/13 Pages) Integrated Device Technology – Spread Spectrum-tolerant inputs

Integrated
Circuit
Systems, Inc.
95V8 5 7
2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz)
Recommended Application:
• DDR Memory Modules / Zero Delay Board Fan Out
• Provides complete DDR registered DIMM solution
with SSTVF16857, SSTVF16859 or
SSTV32852
Product Description/Features:
• Low skew, low jitter PLL clock driver
• 1 to 10 differential clock distribution (SSTL_2)
• Feedback pins for input to output synchronization
• PD# for power management
• Spread Spectrum-tolerant inputs
• Auto PD when input signal removed
Specifications:
• Meets PC3200 Class A+ specification for DDR-I 400
support
• Covers all DDRI speed grades
Switching Characteristics:
• CYCLE - CYCLE jitter: <50ps
• OUTPUT - OUTPUT skew: <40ps
• Period jitter: ±30ps
Pin Configuration
GND
1
CLKC0
2
CLKT0
3
VDD
4
CLKT1
5
CLKC1
6
GND
7
GND
8
CLKC2
9
CLKT2
10
VDD
11
VDD
12
CLK_INT
13
CLK_INC
14
VDD
15
AVDD
16
AGND
17
GND
18
CLKC3
19
CLKT3
20
VDD
21
CLKT4
22
CLKC4
23
GND
24
48
GND
47
CLKC5
46
CLKT5
45
VDD
44
CLKT6
43
CLKC6
42
GND
41
GND
40
CLKC7
39
CLKT7
38
VDD
37
PD#
36
FB_INT
35
FB_INC
34
VDD
33
FB_OUTC
32
FB_OUTT
31
GND
30
CLKC8
29
CLKT8
28
VDD
27
CLKT9
26
CLKC9
25
GND
48-Pin TSSOP/TVSOP
6.10 mm Body, 0.50 mm Pitch = TSSOP
4.40 mm Body, 0.40 mm Pitch = TVSOP
Block Diagram
Functionality
INPUTS
AVDD PD# CLK_INT
OUTPUTS
CLK_INC CLKT CLKC FB_OUTT FB_OUTC
PLL State
GND H
L
H
LH
L
H
Bypassed/off
GND H
H
L
HL
H
2.5V
(nom)
L
L
H
ZZ
Z
2.5V
(nom)
L
H
L
ZZ
Z
2.5V
(nom)
H
L
H
LH
L
2.5V
(nom)
H
H
L
HL
H
2.5V
(nom)
X
<20MHz)⁽¹⁾
ZZ
Z
L
Bypassed/off
Z
off
Z
off
H
on
L
on
Z
off
PD#
FB_INT
FB_INC
CLK_INC
CLK_INT
Control
Logic
PLL
0674S— 3/3/2015
(
20
15
FB_OUTT
FB_OUTC
CLKT0
CLKC0
CLKT1
CLKC1
CLKT2
CLKC2
CLKT3
CLKC3
CLKT4
CLKC4
CLKT5
CLKC5
CLKT6
CLKC6
CLKT7
CLKC7
CLKT8
CLKC8
CLKT9
CLKC9