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8V31012 Datasheet, PDF (1/17 Pages) Integrated Device Technology – 1-to-12, Differential HCSL Fanout Buffer
1-to-12, Differential HCSL Fanout Buffer
8V31012
DATA SHEET
General Description
The 8V31012 is a 1-to-12 Differential HCSL Fanout Buffer. The
8V31012 is designed to translate any differential signal levels to
differential HCSL output levels. An external reference resistor is
used to set the value of the current supplied to an external
load/termination resistor. The load resistor value is chosen to equal
the value of the characteristic line impedance of 50. The 8V31012
is characterized at an operating supply voltage of 3.3V.
The differential HCSL outputs, accurate crossover voltage and duty
cycle make the 8V31012 ideal for interfacing to PCI Express and
FBDIMM applications.
Features
• Twelve differential HCSL outputs
• Translates any differential input signal (LVPECL, LVHSTL, LVDS,
HCSL) to HCSL levels without external bias networks
• Maximum output frequency: 250MHz
• Output skew: 265ps (typical)
• VOH: 850mV (maximum)
• Full 3.3V supply voltage
• Available in lead-free (RoHS 6) package
• -40°C to 85°C ambient operating temperature
Block Diagram
CLK
nCLK
Q6
nQ6
Q7
nQ7
Q8
nQ8
Q9
nQ9
Q10
nQ10
Q11
nQ11
IREF
8V31012 REVISION 1 10/21/15
Pin Assignment
Q0
nQ0
Q0
nQ0
48 47 46 45 44 43 42 41 40 39 38 37
1
36
2
35
VDD
nQ9
Q1
nQ1
VDD 3
Q1 4
34 Q9
33 GND
nQ1 5
32 nQ8
Q2
GND 6
31 Q8
nQ2
Q2 7
8V31012
30 VDD
Q3
nQ2 8
29 nQ7
nQ3
VDD 9
28 Q7
Q4
nQ4
Q5
Q3
nQ3
VDD
10
27
11
26
12
25
13 14 15 16 17 18 19 20 21 22 23 24
VDD
nQ6
Q6
nQ5
48-pin, 7mm x 7mm VFQFN Package
1
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