8S89831I_17 Datasheet, PDF (1/19 Pages) Integrated Device Technology – Differential LVPECL-To-LVPECL/ECL Fanout Buffer

Differential LVPECL-To-LVPECL/ECL
Fanout Buffer
8S89831I
Datasheet
Description
The 8S89831I is a high speed 1-to-4 Differential- to-LVPECL/ECL
Fanout Buffer. The 8S89831I is optimized for high speed and very
low output skew, making it suitable for use in demanding applications
such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fiber
Channel. The internally terminated differential input and VREF_AC pin
allow other differential signal families such as LVDS, LVHSTL and
CML to be easily interfaced to the input with minimal use of external
components.
The device also has an output enable pin which may be useful for
system test and debug purposes. The 8S89831I is packaged in a
small 3mm x 3mm 16-pin VFQFN package which makes it ideal for
use in space-constrained applications.
Features
• Four LVPECL/ECL outputs
• IN, nIN input can accept the following differential input levels:
LVPECL, LVDS, CML, SSTL
• 50 internal input termination to V_T
• Output frequency: >2.1GHz
• Output skew: 30ps (maximum)
• Part-to-part skew: 185ps (maximum)
• Additive phase jitter, RMS: 0.31ps (typical)
• Propagation Delay: 570ps (maximum)
• LVPECL mode operating voltage supply range:
V_CC = 2.5V±5%, 3.3V±5%, V_EE = 0V
• ECL mode operating voltage supply range:
V_CC = 0V, V_EE = -3.3V±5%, -2.5V±5%
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package
Block Diagram
EN ^Pullup
IN
V_T ^50Ω
nIN ^50Ω
V_{REF_AC}
DQ
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Pin Assignment
16 15 14 13
Q1 1
12 IN
nQ1 2
11 VT
Q2 3
10 VREF_AC
nQ2 4
9 nIN
5 6 78
8S89831I
16-Lead VFQFN
3mm x 3mm x 0.925mm package body
K Package
Top View
©2017 Integrated Device Technology, Inc.
1
June 22, 2017