89HPES12N3A Datasheet, PDF (1/2 Pages) Integrated Device Technology – 12 Lane 3-Port PCI Express® Switch

12 Lane 3-Port
PCI Express® Switch
89HPES12N3A
Product Brief
Device Overview
The 89HPES12N3A, a 12 lane 3-port PCI Express® switch, is a
member of the IDT PRECISE™ family of PCI Express switching solu-
tions. The PES12N3A is a peripheral chip that performs PCI Express
Packet switching with a feature set optimized for high performance
applications such as servers and storage. It provides connectivity and
switching functions between a PCI Express upstream port and two
downstream ports or peer-to-peer switching between downstream ports.
The 89HPES12N3A offers an enhanced architecture and feature set
in a package that is pin-compatible with the first generation
89HPES12N3 12-lane, 3-port PCIe switch.
Features
◆ _{High Performance PCI Express Switch}
– Twelve 2.5Gbps PCI Express lanes
– Three switch ports
– Upstream port configurable up to x4
– Downstream ports configurable up to x4
– Low-latency cut-through switch architecture
– Support for Max Payload Sizes up to 2048 bytes
– One virtual channel
– Eight traffic classes
– PCI Express Base Specification Revision 1.1 compliant
◆ _{Flexible Architecture with Numerous Configuration Options}
– Automatic per port link width negotiation to x4, x2 or x1
– Automatic lane reversal on all ports
– Automatic polarity inversion on all lanes
– Ability to load device configuration from serial EEPROM
◆ _{Legacy Support}
– PCI compatible INTx emulation
– Bus locking
◆ _{Highly Integrated Solution}
– Requires no external components
– Incorporates on-chip internal memory for packet buffering and
queueing
– Integrates twelve 2.5 Gbps embedded SerDes with 8B/10B
encoder/decoder (no separate transceivers needed)
◆ _{Reliability, Availability, and Serviceability (RAS) Features}
– Supports ECRC and Advanced Error Reporting
– Internal end-to-end parity protection on all TLPs ensures data
integrity even in systems that do not implement end-to-end
CRC (ECRC)
– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O
– Compatible with Hot-Plug I/O expanders used on PC and
server motherboards
Block Diagram
Frame Buffer
3-Port Switch Core
Route Table
Port
Arbitration
SScchheedduulelerr
Transaction Layer
Data Link Layer
Multiplexer/Demultiplexer
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Transaction Layer
Data Link Layer
Multiplexer/Demultiplexer
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Transaction Layer
Data Link Layer
Multiplexer/Demultiplexer
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
© 2007 Integrated Device Technology, Inc.
12 PCI Express Lanes
One x4 Upstream Port and Two x4 Downstream Ports
Figure 1 Internal Block Diagram
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
1 of 2
February 8, 2007