8545-02_12 Datasheet, PDF (1/13 Pages) Integrated Device Technology – LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER

LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS
FANOUT BUFFER
8545-02
Description
The 8545-02 is a low skew, high performance 1-to-4
LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer. Utilizing Low
Voltage Differential Signaling (LVDS) the 8545-02 provides a low
power, low noise, solution for distributing clock signals over
controlled impedances of 100. The 8545-02 accepts an
LVCMOS/LVTTL input level and translates it to 3.3V LVDS output
levels.
Guaranteed output and part-to-part skew characteristics make the
8545-02 ideal for those applications demanding well defined
performance and repeatability.
Features
• Four differential LVDS output pairs
• Two LVCMOS/LVTTL clock inputs to support redundant
or selectable frequency fanout applications
• Maximum output frequency: 350MHz
• Translates LVCMOS/LVTTL input signals to LVDS levels
• Output skew: 60ps (maximum)
• Part-to-part skew: 450ps (maximum)
• Propagation delay: 1.45ns (maximum)
• Additive phase jitter, RMS: 0.14ps (typical)
• Full 3.3Vsupply mode
• 0°C to 70°C ambient operating temperature
• Available in lead-free package
Block Diagram
CLK_EN ^Pullup
CLK1 ^Pulldown
00
CLK2 ^Pulldown
1¹
CLK_SEL ^Pulldown
nD
Q
LE
OE ^Pullup
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Pin Assignment
GND 1
CLK_EN 2
CLK_SEL 3
CLK1 4
nc 5
CLK2 6
nc 7
OE 8
GND 9
V_DD 10
20 Q0
19 nQ0
18 VDD
17 Q1
16 nQ1
15 Q2
14 nQ2
13 GND
12 Q3
11 nQ3
8545-02
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm
package body
G Package
Top View
IDT™ / ICS™ LVDS FANOUT BUFFER
1
8545AG-02 REV. A 5/7/15