74FCT3807S Datasheet, PDF (1/18 Pages) Integrated Device Technology – Low additive phase jitter RMS

Low Skew 1 to 10 Clock Buffer
74FCT3807S
DATASHEET
Description
The 74FCT3807S is a low skew, single input to ten output,
clock buffer. The 74FCT3807S has best in class additive
phase Jitter of sub 50 fsec.
IDT makes many non-PLL and PLL based low skew output
devices as well as Zero Delay Buffers to synchronize clocks.
Contact us for all of your clocking needs.
Features
• Low additive phase jitter RMS: 50fs
• Low skew outputs (50ps)
• Packaged in 20-pin TSSOP, SSOP, QSOP and VFQFPN
packages, Pb (lead) free
• Operating voltages of 1.8V to 3.3V
• Input/Output clock frequency up to 200 MHz
• Advanced, low power CMOS process
• Extended temperature range (-40°C to +105°C)
Block Diagram
Q0
Q1
Q2
Q3
Q4
ICLK
Q5
Q6
Q7
Q8
Q9
74FCT3807S REVISION A 03/18/15
1
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