7203L25J Datasheet, PDF (1/14 Pages) Integrated Device Technology – CMOS ASYNCHRONOUS FIFO 2,048 x 9, 4,096 x 9 8,192 x 9, 16,384 x 9

CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9
8,192 x 9, 16,384 x 9
32,768 x 9 and 65,536 x 9
IDT7203
IDT7204
IDT7205
IDT7206
IDT7207
IDT7208
FEATURES:
• First-In/First-Out Dual-Port memory
• 2,048 x 9 organization (IDT7203)
• 4,096 x 9 organization (IDT7204)
• 8,192 x 9 organization (IDT7205)
• 16,384 x 9 organization (IDT7206)
• 32,768 x 9 organization (IDT7207)
• 65,636 x 9 organization (IDT7208)
• High-speed: 12ns access time
• Low power consumption
— Active: 660mW (max.)
— Power-down: 44mW (max.)
• Asynchronous and simultaneous read and write
• Fully expandable in both word depth and width
• 720x family is pin and functionally compatible from 256 x 9 to 64k x 9
• Status Flags: Empty, Half-Full, Full
• Retransmit capability
• High-performance CMOS technology
• Military product compliant to MIL-STD-883, Class B
• Standard Military Drawing for #5962-88669 (IDT7203), 5962-89567
(IDT7203), and 5962-89568 (IDT7204) are listed on this function
• Industrial temperature range (–40°C to +85°C) is available
(plastic packages only)
• Green parts available, see ordering information
DESCRIPTION:
The IDT7203/7204/7205/7206/7207/7208 are dual-port memory buffers
with internal pointers that load and empty data on a first-in/first-out basis. The
device uses Full and Empty flags to prevent data overflow and underflow and
expansion logic to allow for unlimited expansion capability in both word size and
depth.
Data is toggled in and out of the device through the use of the Write (W) and
Read (R) pins.
The device's 9-bit width provides a bit for a control or parity at the user’s
option. It also features a Retransmit (RT) capability that allows the read pointer
to be reset to its initial position when RT is pulsed LOW. A Half-Full Flag is
available in the single device and width expansion modes.
These FIFOs are fabricated using high-speed CMOS technology. They
are designed for applications requiring asynchronous and simultaneous read/
writes in multiprocessing, rate buffering and other applications.
Military grade product is manufactured in compliance with MIL-STD-883,
Class B.
FUNCTIONAL BLOCK DIAGRAM
W
WRITE
CONTROL
DATA INPUTS
(D0 -D8)
WRITE
POINTER
RAM ARRAY
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
32,768 x 9
65,536 x 9
READ
POINTER
READ
R
CONTROL
THREE-
STATE
BUFFERS
DATA OUTPUTS
(Q0-Q 8)
FLAG
LOGIC
EF
FF
EXPANSION
XI
LOGIC
XO/HF
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
COMMERCIAL, MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
© 2012 Integrated Device Technology, Inc. All rights reserved. Product subject to change without notice.
RS
RESET
LOGIC
FL/RT
2661 drw01
JUNE 2012
DSC-2661/18