7132SA55JI Datasheet, PDF (1/16 Pages) Integrated Device Technology – HIGH SPEED 2K x 8 DUAL PORT STATIC RAM

Features
◆ _{High-speed access}
– Commercial: 20/25/35/55/100ns (max.)
– Industrial: 25ns (max.)
– Military: 25/35/55/100ns (max.)
◆ _{Low-power operation}
– IDT7132/42SA
Active: 325mW (typ.)
Standby: 5mW (typ.)
– IDT7132/42LA
Active: 325mW (typ.)
Standby: 1mW (typ.)
HIGH SPEED
2K x 8 DUAL PORT
STATIC RAM
IDT7132SA/LA
IDT7142SA/LA
◆ _{MASTER IDT7132 easily expands data bus width to 16-or-more}
bits using SLAVE IDT7142
◆ _{On-chip port arbitration logic (IDT7132 only)}
◆ _{BUSY output flag on IDT7132; BUSY input on IDT7142}
◆ _{Battery backup operation —2V data retention (LA only)}
◆ _{TTL-compatible, single 5V ±10% power supply}
◆ _{Available in 48-pin DIP, LCC and Flatpack, and 52-pin PLCC}
packages
◆ _{Military product compliant to MIL-PRF-38535 QML}
◆ _{Industrial temperature range (–40°C to +85°C) is available for}
selected speeds
◆ _{Green parts available, see ordering information}
Functional Block Diagram
OEL
CEL
R/WL
OER
CER
R/WR
I/OOL-I/O7L
BUSYL^(1,2)
A10L
A0L
I/O
Control
I/O
Control
Address
Decoder
11
CEL
OEL
R/WL
MEMORY
ARRAY
ARBITRATION
LOGIC
Address
Decoder
11
CER
OER
R/WR
I/OOR-I/O7R
m
BUSYR^(1,2)
A10R
A0R
NOTES:
1. IDT7132 (MASTER): BUSY is open drain output and requires pullup resistor of 270Ω.
IDT7142 (SLAVE): BUSY is input.
2. Open drain output: requires pullup resistor of 270Ω.
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©2014 Integrated Device Technology, Inc.
OCTOBER 2014
DSC-2692/20