552G-02ILN Datasheet, PDF (1/7 Pages) Integrated Device Technology – LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER

LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
DATASHEET
ICS552-02
Description
The ICS552-02 is a low skew, single-input to eight-
output clock buffer. The device offers a dual input with
pin select for switching between two clock sources. It is
part of IDT’s ClockBlocks^TM family. See the ICS553 for
a 1 to 4 low skew buffer. For more than 8 outputs see
the MK74CBxxx Buffalo^TM series of clock drivers.
IDT makes many non-PLL and PLL based low skew
output devices as well as Zero Delay Buffers to
synchronize clocks. Contact us for all of your clocking
needs.
Features
• Extremely low skew outputs (50ps maximum)
• Packaged in 16 pin TSSOP
• Pb (lead) free package
• Low power CMOS technology
• Operating Voltages of 2.5 V to 5 V
• Output Enable pin tri-states outputs
• 5 V tolerant input clocks
• Input/Output clock frequency up to 200 MHz
• Input clock multiplexer simplifies clock selection
• Industrial temperature
Block Diagram
Q0
Q1
Q2
INA
1
Q3
INB
0
Q4
Q5
Q6
Q7
SELA
OE
IDT™ / ICS™ LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER
1
ICS552-02 REV L 051310