49FCT3805BQG8 Datasheet, PDF (1/7 Pages) Integrated Device Technology – 3.3V CMOS BUFFER/CLOCK DRIVER

IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
BUFFER/CLOCK DRIVER
IDT49FCT3805B
FEATURES:
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 500ps (max.)
• Very low duty cycle distortion < 1.0ns (max.)
• Very low CMOS power levels
• TTL compatible inputs and outputs
• Inputs can be driven from 3.3V or 5V components
• Two independent output banks with 3-state control
• 1:5 fanout per bank
• "Heartbeat" monitor output
• VCC = 3.3V ± 0.3V
• Available in SSOP, SOIC, and QSOP packages
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The FCT3805B is a 3.3 volt, non-inverting clock driver built using
advanced dual metal CMOS technology. The device consists of two banks
of drivers, each with a 1:5 fanout and its own output enable control. The
device has a "heartbeat" monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document. The FCT3805B offers low capacitance
inputs with hysteresis.
The FCT3805B is designed for high speed clock distribution where
signal quality and skew are critical. The FCT3805B also allows single
point-to-point transmission line driving in applications such as address
distribution, where one signal must be distributed to multiple recievers with
low skew and high signal quality.
For more information on using the FCT3805B with two different input
frequencies on bank A and B, please see AN-236.
PIN CONFIGURATION
OEA
INA
INB
OEB
5
OA1 - OA5
5
OB1 - OB5
MON
VCCA
1
OA1
2
OA2
3
OA3
4
GNDA
5
OA4
6
OA5
7
GNDQ
8
OEA
9
INA
10
20
VCCB
19
OB1
18
OB2
17
OB3
16
GNDB
15
OB4
14
OB5
13
MON
12
OEB
11
INB
SOIC/ SSOP/ QSOP
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COMMERCIAL AND INDUSTRIAL
c 2005 Integrated Device Technology, Inc.
TEMPERATURE
1
RANGE
MAY 2010
DSC 6879/-