5P49V5933_17 Datasheet, PDF (29/33 Pages) Integrated Device Technology – Programmable Clock Generator

5P49V5933 DATASHEET
PCIe Gen3 Magnitude of Transfer Function
For a more thorough overview of PCI Express jitter analysis
methodology, please refer to IDT Application Note PCI Express
Reference Clock Requirements.
Marking Diagram
5933B
ddd
YWW**$
1. Line 1 is the truncated part number.
2. “ddd” denotes dash code.
3. “YWW” is the last digit of the year and week that the part was assembled.
4. “**” denotes sequential lot number.
5. “$” denotes mark code.
MARCH 10, 2017
29
PROGRAMMABLE CLOCK GENERATOR