ICS951412 Datasheet, PDF (9/19 Pages) Integrated Circuit Systems – System Clock Chip for ATI RS480 K8-based Systems

ICS951412
SMBus Table: Device ID Register
Byte 6 Pin #
Name
Bit 7
-
DevID 7
Bit 6
-
DevID 6
Bit 5
-
DevID 5
Bit 4
-
DevID 4
Bit 3
-
DevID 3
Bit 2
-
DevID 2
Bit 1
-
DevID 1
Bit 0
-
DevID 0
SMBus Table: Vendor ID Register
Byte 7 Pin #
Name
Bit 7
-
RID3
Bit 6
-
RID2
Bit 5
-
RID1
Bit 4
-
RID0
Bit 3
-
VID3
Bit 2
-
VID2
Bit 1
-
VID1
Bit 0
-
VID0
SMBus Table: Byte Count Register
Byte 8 Pin #
Name
Bit 7
-
BC7
Bit 6
-
BC6
Bit 5
-
BC5
Bit 4
-
BC4
Bit 3
-
BC3
Bit 2
-
BC2
Bit 1
-
BC1
Bit 0
-
BC0
Bytes 9 to 21 are reserved
Control Function Type
0
Device ID MSB
R
-
Device ID 6
R
-
Device ID 5
R
-
Device ID4
R
-
Device ID3
R
-
Device ID2
R
-
Device ID1
R
-
Device ID LSB
R
-
1
PWD
-
0
-
0
-
0
-
1
-
0
-
0
-
1
-
0
Control Function Type
0
R
-
Revision ID
R
-
R
-
R
-
R
-
VENDOR ID
R
-
(0001 = ICS)
R
-
R
-
1
PWD
-
X
-
X
-
X
-
X
-
0
-
0
-
0
-
1
Control Function
Byte Count
Programming b(7:0)
Type
0
1
RW
RW
RW Writing to this register
RW will configure how many
RW bytes will be read back,
RW default is 9 bytes.
RW
RW
PWD
0
0
0
0
1
0
0
1
0883G—12/08/04
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