ICS843004I-04 Datasheet, PDF (9/14 Pages) Integrated Circuit Systems – FEMTOCLOCKS-TM CRYSTAL/LVCMOS-TO- 3.3V LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
ICS843004I-04
FEMTOCLOCKS™ CRYSTAL/LVCMOS-TO-
3.3V LVPECL FREQUENCY SYNTHESIZER
SCHEMATIC EXAMPLE
Figure 5 shows a schematic example for ICS843004I-04. In
this example, the input is a 19.44MHz parallel resonant crystal
with load capacitor CL=18pF. The 22pF frequency fine tuning
capacitors are used C1 and C2. This example also shows general
logic control input handling. For decoupling capacitors, it is
recommended to have one decouple capacitor per power pin.
Each decoupling capacitor should be located as close as
possible to the power pin. The low pass filter R2, C3 and C4
should also be located as close to the V pin as possible.
CCA
VCC
R2
10 C3
10uF
MR
F_SEL3
VCCA
C4
0.01u
Logic Control Input Examples
VCC
Set Logic
VDD _{Input to}
'1'
RU1
1K
To Logic
Input
pins
RD1
Not Install
Set Logic
VDD _{Input to}
'0'
RU2
Not Install
To Logic
Input
pins
RD2
1K
F_SEL0
F_SEL1
(U1-3)
(U1-11) (U1-22)
VCC
C1
0. 1uF
C2
0.1uF
C3
0.1uF
C2
22pF
X1
19.44MHz
18pF
VCC
Q1
Ro ~ 7 Ohm R8
C1
22pF
Zo = 50 Ohm
43
Driv er_LVCMOS
I N PU T_SEL
F_SEL2
VCCO
U1
843004i-04
3.3V
R3
133
Zo = 50 Ohm
Zo = 50 Ohm
R4
82. 5
R5
133
+
-
R6
82. 5
VCCO
VCC=3.3V
VCCO=3.3V
Zo = 50 Ohm
Zo = 50 Ohm
R5
50
+
-
R6
50
Optional
R7
Y-Termination
50
FIGURE 5. ICS844004I-04 SCHEMATIC EXAMPLE
843004AGI-04
www.icst.com/products/hiperclocks.html
9
REV. A FEBRUARY 15, 2006