ICS843004-02 Datasheet, PDF (9/12 Pages) Integrated Circuit Systems – CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843004-02
CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
LAYOUT GUIDELINE
Figure 4 shows an example of ICS843004-02 application
schematic. In this example, the device is operated at V =3.3V.
CC
The decoupling capacitor should be located as close as
possible to the power pin. Both input options are shown. The
device can either be driven using a quartz crystal or a 3.3V
LVCMOS signal. For the LVPECL output drivers, only two
termination examples are shown in this schematic. Additional
termination approaches are shown in the LVPECL Termination
Application Note.
VCC
R2
10 C3
10uF
Logic Control Input Examples
Set Logic
VDD
Input to
'1'
RU1
1K
Set Logic
VDD
Input to
'0'
RU2
Not Install
To Logic
Input
pins
RD1
Not Install
To Logic
Input
pins
RD2
1K
MR
nPLL_SEL
VCCA
C4
0.01u
F_SEL0
VCC
(U1-3)
(U1-12) (U1-22)
VCC
C1
0.1uF
C2
0.1uF
C3
0.1uF
C2
33pF
F_SEL1
X1
19.44MHz
18pF
VCC
Q1
Ro ~ 7 Ohm R8
C1
27pF
Zo = 50 Ohm
43
Driv er_LVCMOS
nXTAL_SEL
F_SEL2
VCCO
U4
843004-02
3.3V
R3
133
Zo = 50 Ohm
Zo = 50 Ohm
R4
82. 5
R5
133
+
-
R6
82.5
VCCO
VCC=3.3V
VCCO=3.3V
Zo = 50 Ohm
Zo = 50 Ohm
R5
50
+
-
R6
50
Optional
R7
Y-Termination
50
FIGURE 4. ICS843004-02 SCHEMATIC EXAMPLE
843004AG-02
www.icst.com/products/hiperclocks.html
9
REV. A JULY 20, 2005