ICS843022 Datasheet, PDF (8/13 Pages) Integrated Circuit Systems – FEMTOCLOCKS-TM CRYSTAL-TO- 3.3V LVPECL CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843022
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
APPLICATION SCHEMATIC
Figure 3A shows a schematic example of the ICS843022. An
example of LVEPCL termination is shown in this schematic.
Additional LVPECL termination approaches are shown in the
LVPECL Termination Application Note. In this example, an 18pF
parallel resonant 25MHz crystal is used for generating 125MHz
output frequency. The C1 = 27pF and C2 = 33pF are recom-
mended for frequency accuracy. For different board layout, the
C1 and C2 values may be slightly adjusted for optimizing fre-
quency accuracy.
VCC
R2
10 C3
10uF
VCCA
C4
0.1u
C2
33pF
XTXATLA_OLU2T
X1
25MHz
18pF
XTXATLA_LI1N
C1
27pF
VCC
VCC
U1
1
2
3
4
VCCA
VEE
XXTTAAL_LO2UT
XXTTAAL_LIN1
8
VCC
Q0
nQ0
FREQ_SEL
7
6
5
I C S843022
R1
1K
Q
VCC
R3
133
Zo = 50 Ohm
Zo = 50 Ohm
nQ
C5
0.1u
R4
82.5
R5
133
+
-
R6
82.5
FIGURE 3A. ICS843022 SCHEMATIC EXAMPLE
PC BOARD LAYOUT EXAMPLE
Figure 3B shows an example of P.C. board layout. The crystal
X1 footprint in this example allows either surface mount (HC49S)
or through hole (HC49) package. C3 is 0805. C1 and C2 are
0402. Other resistors and capacitors are 0603. This layout as-
sumes that the board has clean analog power and ground planes.
843022AG
FIGURE 3B. ICS843022 PC BOARD LAYOUT EXAMPLE
www.icst.com/products/hiperclocks.html
8
REV. A NOVEMBER 30, 2004