ICS8422002I Datasheet, PDF (8/13 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8422002I
FEMTOCLOCKS™ CRYSTAL-TO-
LVHSTL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS8422002I provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V_DD, V_DDA, and V_DDO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01μF bypass
capacitor should be connected to each V_DDA.
3.3V or 2.5V
V_DD
.01μF 10Ω
V_DDA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS8422002I has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in Figure 2
below were determined using a 26.5625MHz 18pF parallel
resonant crystal and were chosen to minimize the ppm error.
X1
18pF Parallel Crystal
XTAL_OUT
C1
22p
XTAL_IN
C2
22p
ICS8422002I
Figure 2. CRYSTAL INPUt INTERFACE
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
INPUTS:
CRYSTAL INPUT:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1kΩ
resistor can be tied from XTAL_IN to ground.
TEST_CLK INPUT:
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1kΩ resistor can be tied from the TEST_CLK to
ground.
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs;
additional resistance is not required but can be added for
additional protection. A 1kΩ resistor can be used.
OUTPUTS:
LVHSTL OUTPUT
All unused LVHSTL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
8422002AGI
www.icst.com/products/hiperclocks.html
REV. B NOVEMBER 14, 2005
8