ICS840051 Datasheet, PDF (7/10 Pages) Integrated Circuit Systems – FEMTOCLOCK CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR

Integrated
Circuit
Systems, Inc.
ICS840051
FEMTOCLOCKS™ CRYSTAL-TO-
LVCMOS/LVTTL CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. The ICS840051 provides separate
power supplies to isolate any high switching noise from the out-
puts to the internal PLL.V_DD and V_DDA should be individually con-
nected to the power supply plane through vias, and bypass ca-
pacitors should be used for each pin. To achieve optimum
jitter performance, power supply isolation is required. Figure 1
illustrates how a 10Ω resistor along with a 10µF and a .01µF
bypass capacitor should be connected to each V_DDA pin.
V_DD
V_DDA
3.3V
.01µF 10Ω
.01µF
10µF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840051 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using an 18pF parallel reso-
nant crystal and were chosen to minimize the ppm error. The
optimum C1 and C2 values can be slightly adjusted for different
board layouts.
X1
18pF Parallel Crystal
XTAL_OUT
C1
33p
XTAL_IN
C2
22p
Figure 2. CRYSTAL INPUt INTERFACE
840051AG
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7
REV. A JANUARY 14, 2005