ICS16857 Datasheet, PDF (7/8 Pages) Integrated Circuit Systems – DDR 14-Bit Registered Buffer

ICSSSTV16857
N
INDEX
AREA
12
D
c
L
E1 E
a
A2
A
A1
-C-
e
b
SEATING
PLANE
aaa C
6.10 mm. Body, 0.50 mm. pitch TSSOP
(240 mil)
(0.020 mil)
In Millimeters
In Inches
SYMBOL COMMON DIMENSIONS COMMON DIMENSIONS
MIN
MAX
MIN
MAX
A
--
1.20
--
.047
A1
0.05
0.15
.002
.006
A2
0.80
1.05
.032
.041
b
0.17
0.27
.007
.011
c
0.09
0.20
.0035
.008
D
SEE VARIATIONS
SEE VARIATIONS
E
8.10 BASIC
0.319 BASIC
E1
6.00
6.20
.236
.244
e
0.50 BASIC
0.020 BASIC
L
0.45
0.75
.018
.030
N
SEE VARIATIONS
SEE VARIATIONS
α
0°
8°
0°
8°
aaa
--
0.10
--
.004
VARIATIONS
N
48
D mm.
MIN
MAX
12.40
12.60
Reference Doc.: JEDEC Publication 95, MO-153
10-0039
D (inch)
MIN
MAX
.488
.496
Ordering Information
ICSSSTV16857yG-T
Example:
ICS XXXX y G - PPP - T
Designation for tape and reel packaging
Pattern Number (2 or 3 digit number for parts with ROM code patterns)
Package Type
G=TSSOP
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
Third party brands and names are the property of their respective owners.
ICS reserves the right to make changes in the device data identified in
7
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.