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AV9170 Datasheet, PDF (7/11 Pages) Integrated Circuit Systems – Clock Synchronizer and Multiplier
AV9170
Electrical Characteristics at 5V
VDD = +5V ±5%, TA = 0°C to 70°C, unless otherwise stated
PARAMETER
Input Clock Rise Time
Input Clock Fall Time
Output Rise time, 0.8 to 2.0V
Rise time, 20% to 80% VDD
Output Fall time, 2.0 to 0.8V
Fall time, 80% to 20% VDD
Output Duty Cycle, AV9170-01
Output Duty Cycle, AV9170-02
Jitter, 1 sigma
Jitter, absolute
Jitter, absolute
Input Frequency
Input Frequency
Output Frequency CLK1
Output Frequency CLK1
FBIN to IN skew
FBIN to IN skew
CLK1 to CLK2 skew
A/C CHARACTERISTICS
SYMBOL TEST CONDITIONS
ICLKr*
ICLKf*
tr1* 15pF load.
tr2* 15pF load.
tf1* 15pF load.
tf2* 15pF load.
dt1* 15pF load. Note 2, 3
dt2* 15pF load. Note 2, 3
T1s*
Tabs1*
For CLK1 > 10 MHz
(-01, -04)
For CLK1 > 2.5 MHz
(-02, -05)
Tabs2*
For CLK1 < 10 MHz
(-01, -04)
For CLK1 < 2.5 MHz
(-02, -05)
fi1 Note 1, AV9170-01, -04
fi2 AV9170-02, -05
fo1 AV9170-01, -04
fo2 AV9170-02, -05
Tskew1*
Note 2, 4; 15pF load
Input rise time < 5ns
Tskew2*
Note 2, 4; 15pF load
Input rise time < 10ns
Tskew3* Note 2, 4
MIN
—
—
—
—
—
—
40
45
—
–500
—
8
2
20
5
–1
–2
–1
TYP
—
—
0.6
1.2
0.4
0.9
48/52
49/51
125
—
MAX
10
10
2
3
2
2
60
55
300
500
—
2
—
107
—
26.75
—
107
—
26.75
–0.3
1
–0.3
2
0.4
1
*Parameter guaranteed by design and characterization. Not 100% tested in production.
Notes:
1. It may be possible to operate the AV9170 outside of these ranges. Consult ICS for your specific application.
2. All AC Specifications are measured with a 50W transmission line, load terminated with 50W to 1.4V.
3. Duty cycle measured at 1.4V.
4. Skew measured at 1.4V on rising edges. Positive sign indicates the first signal precedes the second signal.
UNITS
ns
ns
ns
ns
ns
ns
%
%
ps
ps
%
MHz
MHz
MHz
MHz
ns
ns
ns
7