ICS950902 Datasheet, PDF (6/20 Pages) Integrated Circuit Systems – Programmable Timing Control Hub™ for P4™

Integrated
Circuit
Systems, Inc.
ICS950902
Byte 0: Functionality and frequency select register (Default=0)
Bit
Description
PWD
Bit
(2,7:4)
Bit 3
Bit 1
Bit 0
Bit2 Bit7 Bit6 Bit5 Bit4 _{CPUCLK AGPCLK PCICLK}
FS4 FS3 FS2 FS1 FS0 ^MHz
MHz
MHz
Spread %
0 0 0 0 0 102.00 68.00 34.00 +/- 0.30% Center Spread
0 0 0 0 1 105.00 70.00 35.00 +/- 0.30% Center Spread
0 0 0 1 0 108.00 72.00 36.00 +/- 0.30% Center Spread
0 0 0 1 1 111.00 74.00 27.00 +/- 0.30% Center Spread
0 0 1 0 0 114.00 76.00 38.00 +/- 0.30% Center Spread
0 0 1 0 1 117.00 78.00 39.00 +/- 0.30% Center Spread
0 0 1 1 0 120.00 80.00 40.00 +/- 0.30% Center Spread
0 0 1 1 1 123.00 82.00 41.00 +/- 0.30% Center Spread
0 1 0 0 0 126.00 72.00 36.00 +/- 0.30% Center Spread
0 1 0 0 1 130.00 74.30 37.10 +/- 0.30% Center Spread
0 1 0 1 0 133.90 66.95 33.48 +/- 0.30% Center Spread
0 1 0 1 1 140.00 70.00 35.00 +/- 0.30% Center Spread
0 1 1 0 0 144.00 72.00 36.00 +/- 0.30% Center Spread
0 1 1 0 1 148.00 74.00 37.00 +/- 0.30% Center Spread
0 1 1 1 0 152.00 76.00 38.00 +/- 0.30% Center Spread
0 1 1 1 1 156.00 78.00 39.00 +/- 0.30% Center Spread
1 0 0 0 0 160.00 80.00 40.00 +/- 0.30% Center Spread
1 0 0 0 1 164.00 82.00 41.00 +/- 0.30% Center Spread
1 0 0 1 0 166.60 66.60 33.30 +/- 0.30% Center Spread
1 0 0 1 1 170.00 68.00 34.00 +/- 0.30% Center Spread
1 0 1 0 0 175.00 70.00 35.00 +/- 0.50% Center Spread
1 0 1 0 1 180.00 72.00 36.00 +/- 0.50% Center Spread
1 0 1 1 0 185.00 74.00 37.00 +/- 0.50% Center Spread
1 0 1 1 1 190.00 76.00 38.00 +/- 0.30% Center Spread
1 1 0 0 0 66.80 66.80 33.40 +/- 0.30% Center Spread
1 1 0 0 1 100.90 67.27 33.63 +/- 0.30% Center Spread
1 1 0 1 0 133.60 66.80 33.40 +/- 0.30% Center Spread
1 1 0 1 1 200.40 66.80 33.40 +/- 0.30% Center Spread
1 1 1 0 0 66.60 66.60 32.30 0 to - 0.6% Down Spread
1 1 1 0 1 100.00 66.60 33.30 0 to - 0.6% Down Spread
1 1 1 1 0 200.00 66.60 33.30 0 to - 0.6% Down Spread
1 1 1 1 1 133.30 66.60 33.30 0 to - 0.6% Down Spread
0 - Frequency is selected by hardware select, latched inputs
1 - Frequency is selected by Bit 2,7:4
0 - Normal
1 - Spread spectrum enable
0 - Running
1 - Tristate all outputs
Note 1
0
1
0
Notes:
1. Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
0475G—03/23/04
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