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ICS932S208 Datasheet, PDF (6/20 Pages) Integrated Circuit Systems – Programmable Timing Control Hub™ for Next Gen P4™ processor
Integrated
Circuit
Systems, Inc.
ICS932S208
Electrical Characteristics - CPU & SRC 0.7V Current Mode Differential Pair
TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =2pF
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Current Source Output
Impedance
Output High Voltage
Output Low Voltage
Zo1
VOH3
VOL3
VO = Vx
IOH = -1 mA
IOL = 1 mA
3000
2.4
Ω
V
0.4
Voltage High
Voltage Low
VHigh
VLow
Statistical measurement on single
ended signal using oscilloscope
math function.
660
-150
850
mV
150
Max Voltage
Min Voltage
Vovs
Vuds
Measurement on single ended
signal using absolute value.
-300
1150
mV
Crossing Voltage (abs) Vcross(abs)
250
550
mV
Crossing Voltage (var)
d-Vcross
Variation of crossing over all
edges
140
mV
Long Accuracy
ppm
see Tperiod min-max values
-300
300
ppm
200MHz nominal
4.9985
5.0015
ns
200MHz spread
4.9985
5.0266
ns
166.66MHz nominal
5.9982
6.0018
ns
Average period
Tperiod
166.66MHz spread
133.33MHz nominal
5.9982
7.4978
6.0320
ns
7.5023
ns
133.33MHz spread
7.4978
5.4000
ns
100.00MHz nominal
9.9970
10.0030 ns
100.00MHz spread
9.9970
10.0533 ns
200MHz nominal
4.8735
ns
Absolute min period
Tabsmin
166.66MHz nominal/spread
133.33MHz nominal/spread
5.8732
7.3728
ns
ns
100.00MHz nominal/spread 9.8720
ns
Rise Time
tr
VOL = 0.175V, VOH = 0.525V
175
700
ps
Fall Time
tf
VOH = 0.525V VOL = 0.175V
175
700
ps
Rise Time Variation
d-tr
125
ps
Fall Time Variation
d-tf
125
ps
Duty Cycle
dt3
Measurement from differential
wavefrom
45
55
%
Skew
tsk3
VT = 50%
100
ps
Jitter, Cycle to cycle
tjcyc-cyc
Measurement from differential
wavefrom
125
ps
1Guaranteed by design, not 100% tested in production.
2 All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that Ref output is at
14.31818MHz
SRC clock outputs run at only 100MHz or 200MHz, specs for 133.33 and 166.66 do not apply to SRC clock pair.
NOTES
1
1
1
1
1
1
1
1,2
2
2
2
2
2
2
2
2
1,2
1,2
1,2
1,2
1
1
1
1
1
1
1
0743D—07/07/04
6