ICS9158-03 Datasheet, PDF (6/7 Pages) Integrated Circuit Systems – Frequency Generator and Integrated Buffer

ICS9158-03
Electrical Characteristics at 3.3V
V_DD = +3.3V±10%, T_A=0°C to 70°C unless otherwise stated
PARAM ETER
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage
Output High Voltage¹
Output Low Current¹
Output High Current¹
Supply Current
Output Frequency Change
over Supply and
Tem perature¹
Short Circuit Current¹
Pull-up Resistor Value¹
Input Capacitance¹
Load Capacitance¹
DC Characteristics
SYMBOL TEST CONDITIONS
MIN
VIL
VIH
0.7 VDD
IIL
V IN= 0V (P ull-up )
-10
IIH
V IN= V DD
-5
VOL IOL=10mA
VOH IOH=-5mA
0.85VDD
IOL
V OL= 0 .2V DD
20
IOH
V OH= 0.7V DD
IDD No load, 66 MHz
FD
With respect to typical
frequency
ISC
Each output clock
25
RPU Input pin
Ci
Except X1, X2
CL
Pins X1, X2
TYP
30
-15
43
0.002
56
900
20
MAX
0.2 VDD
0.1VDD
-10
70
0.01
8
UNITS
V
V
µA
µA
V
V
mA
mA
mA
%
mA
kW
pF
pF
AC Characteristics
PA R A M E T E R
Output Rise tim e,
0.8 to 2.0V¹
Rise time, 20% to 80% VDD¹
Output Fall time, 2.0 to 0.8V¹
Fall time, 80% to 20% VDD¹
Duty cycle¹
Jitter, one sigm a¹
Jitter, absolute¹
Jitter, absolute¹
Input Frequency
Clock skew window between
CLK2A, CLK1(A-D)
CPU and CLK12(A-C) outputs¹
Frequency Transition time¹
SYM BO L
tr
tr
tf
tf
dt
tj1s
tjab
tjab
fi
T sk
tft
TEST CONDITIONS
30pF load
30pF load
30pF load
30pF load
30pF load
As com pared with clock
period
25-66 M Hz clocks
From 4 to 50 MHz
M IN
-
-
-
-
40/50
TYP
1
2.5
0.5
1.5
44/46
0.5
2
14.318
100
13
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
MAX
2.5
4.0
2.5
4.0
50/40
2.0
5
300
250
20
U N IT S
ns
ns
ns
ns
%
%
%
ps
MHz
ps
ms
6