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ICS97U877 Datasheet, PDF (5/13 Pages) Integrated Circuit Systems – 1.8V Wide Range Frequency Clock Driver
ICS97U8 7 7
Recommended Operating Condition (see note1)
TA = 0 - 70°C; Supply Voltage AVDD, VDDQ = 1.8 V +/- 0.1V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
Supply Voltage
VDDQ, AVDD
1.7
CLK_INT, CLK_INC, FB_INC,
Low level input voltage
VIL
FB_INT
OE, OS
High level input voltage
DC input signal voltage (note
2)
Differential input signal
voltage (note 3)
VIH
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.65 x VDDQ
OE, OS
0.65 x VDDQ
VIN
-0.3
DC - CLK_INT, CLK_INC,
VID
FB_INC, FB_INT
AC - CLK_INT, CLK_INC,
FB_INC, FB_INT
0.3
0.6
Output differential cross-
voltage (note 4)
VOX
VDDQ/2 - 0.10
Input differential cross-
voltage (note 4)
VIX
VDDQ/2 - 0.15
High level output current
IOH
Low level output current
IOL
Operating free-air
temperature
TA
0
TYP
1.8
VDD/2
MAX
1.9
UNITS
V
0.35 x VDDQ
V
0.35 x VDDQ
V
V
V
VDDQ + 0.3
V
VDDQ + 0.4
V
VDDQ + 0.4
V
VDDQ/2 + 0.10 V
VDDQ2 + 0.15 V
-9
mA
9
mA
70
°C
Notes:
1. Unused inputs must be held high or low to prevent them from floating.
2. DC input signal voltage specifies the allowable DC execution of differential input.
3. Differential inputs signal voltages specifies the differential voltage [VTR-VCP]
required for switching, where VTR is the true input level and VCP is the
complementary input level.
4. Differential cross-point voltage is expected to track variations of VDDQ and is the
voltage at which the differential signal must be crossing.
0792A—04/15/04
5