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ICS94236 Datasheet, PDF (5/17 Pages) Integrated Circuit Systems – Programmable System Clock Chip for AMD - K7™ processor
ICS94236
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Bit
(2,7:4)
Bit 3
Bit 1
Bit 0
Description
Bit2 Bit7 Bit6 Bit5 Bit4 CPUCLK PCICLK
FS4 FS3 FS2 FS1 FS0 MHz
MHz
Spread %
0 0 0 0 0 95.00
31.67
0.45% Center Spread
0 0 0 0 1 100.00 33.33
0.45% Center Spread
0 0 0 1 0 102.00 34.00
0.45% Center Spread
0 0 0 1 1 105.00 35.00
0.45% Center Spread
0 0 1 0 0 110.00 36.67
0.45% Center Spread
0 0 1 0 1 113.00 37.67
0.45% Center Spread
0 0 1 1 0 115.00 38.33
0.45% Center Spread
0 0 1 1 1 120.00 40.00
0.45% Center Spread
0 1 0 0 0 133.33 33.33
0.45% Center Spread
0 1 0 0 1 135.00 33.75
0.45% Center Spread
0 1 0 1 0 137.00 34.25
0.45% Center Spread
0 1 0 1 1 139.00 34.75
0.45% Center Spread
0 1 1 0 0 141.00 35.25
0.45% Center Spread
0 1 1 0 1 143.00 35.75
0.45% Center Spread
0 1 1 1 0 145.00 36.25
0.45% Center Spread
0 1 1 1 1 150.00 37.50
0.45% Center Spread
1 0 0 0 0 100.90 33.63
0.45% Center Spread
1 0 0 0 1 100.00 33.33
0 to - 0.7% spread
1 0 0 1 0 103.00 34.33
0.45% Center Spread
1 0 0 1 1 107.00 35.67
0.45% Center Spread
1 0 1 0 0 117.00 39.00
0.45% Center Spread
1 0 1 0 1 120.00 30.00
0.45% Center Spread
1 0 1 1 0 123.00 30.75
0.45% Center Spread
1 0 1 1 1 125.00 31.25
0.45% Center Spread
1 1 0 0 0 133.33 33.33
0 to - 0.7% spread
1 1 0 0 1 133.90 33.48
0.45% Center Spread
1 1 0 1 0 147.00 36.75
0.45% Center Spread
1 1 0 1 1 151.00 37.75
0.45% Center Spread
1 1 1 0 0 153.00 38.25
0.45% Center Spread
1 1 1 0 1 155.00 38.75
0.45% Center Spread
1 1 1 1 0 160.00 40.00
0.45% Center Spread
1 1 1 1 1 200.00 50.00
0.45% Center Spread
0-Frequency is selected by hardware select, latched inputs
1- Frequency is selected by Bit 2,7:4
0- Normal
1- Spread spectrum enable
0- Running
1- Tristate all outputs
PWD
Note 1
0
1
0
Note: Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
0451A—01/10/03
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