ICS94235 Datasheet, PDF (5/19 Pages) Integrated Circuit Systems – PROGRAMMABLE SYSTEM CLOCK CHIP FOR AMD-K7 TM PROCESSOR

ICS94235
Brief I²C registers description for ICS94235
Programmable System Frequency Generator
Register Name
Functionality & Frequency
Select Register
Output Control Registers
Byte
0
1-6
Vendor ID & Revision ID
7
Registers
Byte Count
Read Back Register
8
Watchdog Timer
Count Register
9
Watchdog Control Registers 10 Bit [6:0]
VCO Control Selection Bit 10 Bit [7]
VCO Frequency Control
Registers
Spread Spectrum Control
Registers
Group Skews Control
Registers
Output Rise/Fall Time
Select Registers
11-12
13-14
15-16
17-20
Description
Output frequency, hardware / I²C
frequency select, spread spectrum &
output enable control register.
Active / inactive output control
registers/latch inputs read back.
Byte 11 bit[7:4] is ICS vendor id - 1001.
Other bits in this register designate device
revision ID of this part.
Writing to this register will configure
byte count and how many byte will be
read back. Do not write 00H to this byte.
Writing to this register will configure the
number of seconds for the watchdog
timer to reset.
Watchdog enable, watchdog status and
programmable ’safe’frequency’ can be
configured in this register.
This bit select whether the output
frequency is control by hardware/byte 0
configurations or byte 11&12
programming.
These registers control the dividers ratio
into the phase detector and thus control
the VCO output frequency.
These registers control the spread
percentage amount.
Increment or decrement the group skew
amount as compared to the initial skew.
These registers will control the output
rise and fall time.
PWD Default
See individual
byte description
See individual
byte description
See individual
byte description
08H
10H
000,0000
0
Depended on
hardware/byte 0
configuration
Depended on
hardware/byte 0
configuration
See individual
byte description
See individual
byte description
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