ICS9179-12 Datasheet, PDF (5/9 Pages) Integrated Circuit Systems – 3 DIMM Buffer

ICS9179 - 12
Serial Configuration Command Bitmaps
Byte 0: OUTPUT Clock Register (Default=0)
Byte 1: OUTPUT Clock Register
BIT PIN# PWD
DESCRIPTION
Bit7 11
1 OUTPUT5
Bit6 10
1 OUTPUT4
Bit5
-
1 Reserved
Bit4
-
1 Reserved
Bit3
7
1 OUTPUT3
Bit2
6
1 OUTPUT2
Bit1
3
1 OUTPUT1
Bit0
2
1 OUTPUT0
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
27
26
23
22
-
-
19
18
PWD
DESCRIPTION
1 OUTPUT11 (Act/Inact)
1 OUTPUT10 (Act/Inact)
1 OUTPUT9 (Act/Inact)
1 OUTPUT8 (Act/Inact)
1 Reserved
1 Reserved
1 OUTPUT7 (Act/Inact)
1 OUTPUT6 (Act/Inact)
Byte 2: OUTPUT Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
12
-
-
-
-
-
-
PWD
DESCRIPTION
1 Reserved
1 OUTPUT12 (Act/Inact)
1 Reserved
1 Reserved
1 Reserved
1 Reserved
1 Reserved
1 Reserved
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Note: PWD = Power-Up Default
Functionality
OE#
OUTPUT (0:13)
0
Hi-Z
1
1 X BUF_IN
ICS9279-12 Power Consumption
The values below are estimates of target specifications.
Condition
No Clock Mode
(BUF_IN - VDD1 or GND)
I²C Circuitry Active
Active 66MHz
(BUF_IN = 66.66MHz)
Active 100MHz
(BUF_IN = 100.00MHz)
Active 133MHz
(BUF_IN = 133.33MHz)
Max 3.3V supply consumption
Max discrete cap loads
VDD = 3.465V
All static inputs = VDD or GND
3mA
230mA
360mA
500mA
5