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ICS9169C-273 Datasheet, PDF (5/8 Pages) Integrated Circuit Systems – Frequency Generator for Pentium™ Based Systems
ICS9169C-273
Technical Pin Function Descriptions
VDD1
This is the power supply to the internal logic of the device as
well as the following clock output buffers:
A. REF clock output buffers
B. BUS clock output buffers
C. Fixed clock output buffers
This pin may be operated at any voltage between 3.0 and
5.5 volts. Clocks from the listed buffers that it supplies
will have a voltage swing from ground to this level. For the
actual guaranteed high and low voltage levels of these
clocks, please consult the AC parameter table in this data
sheet.
GND
This is the power supply ground return pin for the internal
logic of the device as well as the following Clock Output
buffers:
A. REF clock output buffers
B. BUS clock output buffers
C. CPU clock output buffers
D. Fixed clock output buffers
E. 24/48MHz clock output buffers
X1
This pin serves one of two functions. When the device is
used with a crystal, X1 acts as the input pin for the reference
signal that comes from the discrete crystal. When the device
is driven by an external clock signal, X1 is the device’ input
pin for that reference clock. This pin also implements an
internal crystal loading capacitor that is connected to ground.
See the data tables for the value of the capacitor.
X2
This pin is used only when the device uses a Crystal as the
reference frequency source. In this mode of operation, X2 is
an output signal that drives (or excites) the discrete crystal.
This pin also implements an internal crystal loading capacitor
that is connected to ground. See the data tables for the value
of the capacitor.
CPU (1:12)
These pins are clock outputs that drive the processor and
other CPU related circuitry that require clocks which are
in tight skew tolerance with the CPU clock. The voltage
swing of these clocks is controlled by that which is applied
to the VDD pins of the device. See note on VDD3. See the
Functionality Table at the beginning of this data sheet for
a list of the specific frequencies that this clock operates at
and the selection codes that are necessary to produce
these frequencies.
BUS (1:6)
These pins are the Clock Outputs that are intended to drive
the systems plug-in card bus. The voltage swing of these
clocks is controlled by the supply that is applied to the
VDD pin of the group. See the Functionality Table at the
beginning of this data sheet for a list of the specific
frequencies that this clock operates at and the selection
codes that are necessary to produce these frequencies.
FS0, FS1, FS2
These pins control the frequency of the clocks at the CPU,
CPUL, BUS & SDRAM pins. See the Funtionality table at
the beginning of this data sheet for a list of the specific
frequencies that this clock operates at and the selection
codes that are necessary to produce these frequencies. The
device reads these pins at power-up and stores the
programmed selection code in an internal data latch. (See
programming section of this data sheet for configuration
circuitry recommendations.
BSEL
When this pin is a logic 1, it will place the CPU clocks in
the synchronous mode (running at half the frequency of
the Ref). If this pin is a logic 0, it will be in the asynchronous
mode for the CPU clocks and will operate at the
preprogrammed fixed frequency rate. It is a shared pin
and is programed the same way as the frequency select
pins.
VDD (2:3)
These are the power supply pins for the CPU (1:6) and
CPU (7:12) clock buffers. By separating the clock power
pins, each group can receive the appropriate power
decoupling and bypassing necessary to minimize EMI
and crosstalk between the individual signals. VDD2 can
be reduced to 2.5V VDD for advanced processor clocks,
which will bring CPU (1:6) outputs at 0 to 2.5V output
swings.
VDD4
This is the power supply pin for BUS clock buffers
BUS (1:6).
VDD5
This is the power supply pin for fixed clock buffer (48MHz
and 24MHz).
48 MHz
This is a fixed frequency clock that is typically used to
drive Super I/O peripheral device needs.
24 MHz
This is a fixed frequency clock that is typically used to
drive Keyboard controller clock needs.
REF
This is a fixed frequency clock that runs at the same
frequency as the input reference clock (typically 14.31818
MHz) is and typically used to drive Video and ISA BUS
requirements.
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