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ICS85314I-11 Datasheet, PDF (5/18 Pages) Integrated Circuit Systems – LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER
Integrated
Circuit
Systems, Inc.
ICS85314I-11
LOW SKEW, 1-TO-5
DIFFERENTIAL-TO-2.5V/3.3V LVPECL FANOUT BUFFER
TABLE 4D. LVPECL DC CHARACTERISTICS, VCC = 2.375V TO 3.8V, VEE = 0V, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
VOH
Output High Voltage; NOTE 1
VOL
Output Low Voltage; NOTE 1
VSWING Peak-to-Peak Output Voltage Swing
NOTE 1: Outputs terminated with 50Ω to VCC - 2V.
VCC - 1.4
VCC - 2.0
0.6
Maximum
VCC - 0.9
VCC - 1.7
1.0
Units
V
V
V
TABLE
5.
AC
CHARACTERISTICS,
V
CC
=
2.375V
TO
3.8V,
V
EE
=
0V,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
fMAX
tp
LH
tsk(o)
tjit (Ø)
tsk(pp)
Output Frequency
Propagation Delay, Low to High;
NOTE 1
Output Skew; NOTE 2, 5
RMS Phase Jitter (Random);
NOTE 4
Part-to-Part Skew; NOTE 3, 5
IJ 700MHz
Integration Range:
(12kHz - 20MHz)
700
1.0
1.4
1.8
30
0.05
350
tS
Setup Time
nCLK_EN to CLK
50
tH
Hold Time
nCLK_EN to CLK
50
tR / tF
Output Rise/Fall Time
20% to 80%
200
700
odc
Output Duty Cycle
IJ 700MHz
45
55
All parameters measured at fMAX unless noted otherwise.
The cycle-to-cycle jitter on the input will equal the jitter on the output. The part does not add jitter
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 4: Please refer to Phase Noise Plot.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
Units
MHz
ns
ps
ps
ps
ps
ps
ps
ps
85314AGI-11
www.icst.com/products/hiperclocks.html
5
REV. C MAY 24, 2005