ICS844004I Datasheet, PDF (5/12 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER

Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS844004I
FEMTOCLOCKS™ CRYSTAL-TO-
LVDS FREQUENCY SYNTHESIZER
TABLE 5A. AC CHARACTERISTICS, V_DD = V_DDA = V_DDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
F_SEL[1:0] = 00
186.67
f_OUT
Output Frequency
F_SEL[1:0] = 01
F_SEL[1:0] = 10
140
93.33
F_SEL[1:0] = 11
46.67
tsk(o) Output Skew; NOTE 1, 2
TBD
212.5MHz, (637kHz - 10MHz)
0.65
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 3
159.375MHz, (637kHz - 10MHz)
156.25MHz, (637kHz - 10MHz))
106.25MHz, (637kHz -10MHz)
0.61
0.74
0.64
53.125MHz, (637kHz - 10MHz)
0.80
t_R / t_F
Output Rise/Fall Time
20% to 80%
400
odc
Output Duty Cycle
50
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at V_DDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
Maximum
226.66
170
113.33
56.66
Units
MHz
MHz
MHz
MHz
ps
ps
ps
ps
ps
ps
ps
%
TABLE 5B.
AC
CHARACTERISTICS,
V
DD
=
V
DDA
=
V
DDO
= 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
f_OUT
Output Frequency
tsk(o) Output Skew; NOTE 1, 2
Test Conditions
F_SEL[1:0] = 00
F_SEL[1:0] = 01
F_SEL[1:0] = 10
F_SEL[1:0] = 11
212.5MHz, (637kHz - 10MHz)
Minimum
186.67
140
93.33
46.67
Typical
TBD
0.65
Maximum
226.66
170
113.33
56.66
Units
MHz
MHz
MHz
MHz
ps
ps
159.375MHz, (637kHz - 10MHz)
0.61
ps
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 3
156.25MHz, (637kHz - 10MHz))
0.74
ps
106.25MHz, (637kHz -10MHz)
0.64
ps
53.125MHz, (637kHz - 10MHz)
0.80
ps
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
430
ps
50
%
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at V_DDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
844004AGI
www.icst.com/products/hiperclocks.html
5
REV. A JUNE 15, 2005