ICS9248-99 Datasheet, PDF (4/13 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Celeron & PII/III™

ICS9248-99
Preliminary Product Preview
Serial Configuration Command Bitmap
Byte4: Functionality and Frequency Select Register (default = 0)
Bit
Description
Bit (2, 7:4)
CPUCLK SDRAM 3V66 PCICLK
(MHz) (MHz) (MHz) (MHz
00000
75.33 113.00 75.33
0000 1
125.00 125.00 83.33
000 10
129.00 129.00 86.00
000 11
150.29 113.00 75.33
00 100
150.00 150.00 100.00
00 10 1
112.00 112.00 74.67
00 110
145.00 145.00 96.67
00 111
143.64 108.00 72.00
0 1000
68.30 102.50 68.33
0 100 1
105.00 105.00 70.00
0 10 10
138.00 138.00 92.00
0 10 11
140.00 105.00 70.00
0 1100
66.67 100.00 66.67
0 110 1
Bit 2,
Bit 7:4
0
1
1
1
0
0 1111
100.00
133.60
133.33
100.00
133.60
100.00
66.67
89.07
66.67
10 0 0 0
156.94 118.00 78.67
1000 1
160.00 120.00 80.00
100 10
146.30 110.00 73.33
100 11
127.00
95.25 63.50
10 100
127.00 127.00 84.67
10 10 1
121.00 121.00 80.67
10 110
117.00 117.00 78.00
10 111
114.00 114.00 76.00
1 10 0 0
80.00 120.00 80.00
1100 1
78.00 117.00 78.00
110 10
200.00 200.00 133.33
110 11
180.00 180.00 120.00
1 1 10 0
166.00 166.00 110.67
1110 1
110.00 110.00 73.33
1 1 1 10
107.00 107.00 71.33
11111
90.00
90.00 60.00
Bit 3
0 - Frequency is selected by hardware select, Latched Inputs
1 - Frequency is selected by Bit 2, 7:4
Bit 1
0 - Normal
1 - Spread Spectrum Enabled ± 0.25% Center Spread
Bit 0
0 - Running
1- Tristate all outputs
37.67
41.67
43.00
37.67
50.00
37.33
48.33
36.00
34.17
35.00
46.00
35.00
33.33
33.33
44.53
33.33
39.33
40.00
36.67
31.75
42.33
40.33
39.00
38.00
40.00
39.00
66.67
60.00
55.33
36.67
35.67
30.00
IOAPIC
(MHz)
=PCI/2 =PCI
18.83 37.67
20.83 41.67
21.50 43.00
18.83 37.67
25.00 50.00
18.67 37.33
24.17 48.33
18.00 36.00
17.08 34.17
17.50 35.00
23.00 46.00
17.50 35.00
16.67 33.33
16.67 33.33
22.27 44.53
16.67 33.33
19.67 39.33
20.00 40.00
18.33 36.67
15.88 31.75
21.17 42.33
20.17 40.33
19.50 39.00
19.00 38.00
20.00 40.00
19.50 39.00
33.33 66.67
30.00 60.00
27.67 55.33
18.33 36.67
17.83 35.67
15.00 30.00
PWD
00011
Note1
0
1
0
Note 1: Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
1) The IOAPIC Frequency change from IOAPIC=PCICLK/2 to IOAPIC=PCICLK is controlled by
IOAPC_Freq control in I²C Byte 3 Bit 1
2) The I²C readback of the power up default indicate the revision ID in bits 2, 7:4
I²C is a trademark of Philips Corporation
Third party brands and names are the property of their respective owners.
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