ICS9248-80 Datasheet, PDF (4/7 Pages) Integrated Circuit Systems – General Purpose 133MHz System Clock

ICS9248 - 80
Byte 0: Functionality and frequency select register (Default=0)
(1 = Running, 0 = Stopped Low)
Bit
Bit7
Bit (2, 6:4)
Bit3
Bit1
Bit0
Description
0: 0 to -0.5% down spread
1: 0 to -1.0% down spread
Bits
26 54
CLK frequency
0 0 00
133.34
0001
125.01
0 0 10
120.00
00 11
114.99
0 100
109.99
0 101
105.00
0 1 10
100.00
0 111
95.00
10 00
91.00
10 0 1
85.01
10 10
75.00
10 11
70.00
1100
66.67
1 10 1
60.00
1 1 10
54.99
1 1 11
33.33
0: Frequency is selected by hardware FS(0:3)
1: frequency is selected by bits 2, 6:4 of I²C
0: Normal
1: Spread
0: Outputs running
1: Outputs tri-stated
Notes:
1. Default is for frequency control thru hardware pins.
Byte 1: CLK output control register
(1 = Running, 0 = Stopped Low)
Bit Pin# PWD
Bit 7 16
1
Bit 6 17
1
Bit 5 19
1
Bit 4 20
1
Bit 3 22
1
Bit 2 23
1
Bit 1 25
1
Bit 0 26
1
Description
CLK7
CLK6
CLK5
CLK4
CLK3
CLK2
CLK1
CLK0
PWD
0
Note 1
0
0
0
4