ICS9248-151 Datasheet, PDF (4/14 Pages) Integrated Circuit Systems – Frequency Generator & Integrated Buffers for Celeron & PII/III™

ICS9248-151
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Bit 2,1
Bit 6:4
Bit 3
Bit 7
Bit 0
Description
Bit 2 Bit 1 Bit 6 Bit 5 Bit 4 CPUCLK AGPCLK
FS4 FS3 FS2 FS1 FS0 (MHz) (MHz)
0
0
00
0 200.00 80.00
0
0
00
1 190.00 76.00
0
0
0
1 0 180.00 72.00
0
0
0
1
1 170.00 68.00
0
0
10
0 166.00 66.40
0
0
10
1 160.00 64.00
0
0
1
1 0 150.00 75.00
0
0
1
1
1 145.00 72.50
0
100
0 140.00 70.00
0
100
1 136.00 68.00
0
10
1 0 130.00 65.00
0
10
1 1 124.00 62.00
0
1
10
0
66.67
66.67
0
1
10
1 100.00 66.67
0
1
1 1 0 118.00 78.67
0
1
1 1 1 133.33 66.67
1
0
00
0
66.80
66.80
1
0
0
0
1 100.20 66.80
1 0 0 1 0 115.00 76.67
1 0 0 1 1 133.40 66.70
1
0
10
0
66.80
66.80
1
0
10
1 100.20 66.80
1
0
1
1
0 110.00 73.33
1
0
1
1
1 133.40 66.70
1
1
0
0
0 105.00 70.00
1
1
00
1
90.00
60.00
1
1
0
1
0
85.00
56.67
1
1
0
1
1
78.00
78.00
1
1
10
0
66.67
66.67
1
1
10
1 100.00 66.67
1
1
1
10
75.00
75.00
1
1
1
1
1 133.33 66.67
0 - Frequency is selected by hardware select, Latched Inputs
1 - Frequency is selected by Bit 2, 1 [6:4]
0 - Normal
1 - Spread Spectrum Enabled ± 0.25% Center Spread
0 - Running
1- Tristate all outputs
PCICLK
(MHz)
40.00
38.00
36.00
34.00
33.20
32.00
37.50
36.25
35.00
34.00
32.50
31.00
33.34
33.33
39.33
33.34
33.40
33.40
38.33
33.35
33.40
33.40
36.67
33.35
35.00
30.00
28.33
39.00
33.34
33.33
37.50
33.34
IOAPIC
(MHz)
20.00
19.00
18.00
17.00
16.60
13.00
18.75
18.12
17.50
17.00
16.25
15.50
16.67
16.66
19.66
16.67
16.70
16.70
19.16
16.67
16.67
16.70
18.33
16.67
17.50
15.00
14.16
19.5
16.67
16.66
18.75
16.67
Spread
Precentage
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.75%
+/- 0.75%
+/- 0.25%
+/- 0.75%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.5%
+/- 0.5%
+/- 0.25%
+/- 0.5%
+/- 0.25%
+/- 0.25%
+/- 0.25%
+/- 0.25%
0 to -0.5%
0 to -0.5%
+/- 0.25%
0 to -0.5%
Note1: Default at power-up will be for latched logic inputs to define frequency, as diplayed by Bit 3.
PWD
XXXX
Note1
0
1
0
Third party brands and names are the property of their respective owners.
4