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ICS9112-17 Datasheet, PDF (4/8 Pages) Integrated Circuit Systems – Low Skew Output Buffer
ICS9112-17
Electrical Characteristics - OUTPUT
TA = 0 - 70C; VDD = VDDL = 5.0 V +/-10%; CL = 20 - 30 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
Output Impedance
Output Impedance
RDSP
RDSN
VO = VDD*(0.5)
VO = VDD*(0.5)
Output High Voltage
VOH
IOH = -8 mA
Output Low Voltage
Rise Time1
Fall Time1
VOL
IOL = 8 mA
Tr
VOL = 0.8 V, VOH = 2.0 V
Tf
VOH = 2.0 V, VOL = 0.8 V
PLL Lock Time1
Stable power supply, valid clock presented on
tLOCK REF pin
Duty Cycle1
Dt
VT = 1.4V;Cl=30pF
Cycle to Cycle jitter1
Tcyc-cyc at 66MHz , Loaded Outputs
Tcyc-cyc >66MHz , Loaded Outputs
Absolute Jitter1
Tjabs 10000 cycles; Cl=30pF
Jitter; 1-Sigma1
Tj1s 10000 cycles; Cl=30pF
Skew1
Tsk
VT = 1.4 V (Window) Output to Output
Device to Device Skew1
Delay Input-Output1
Tdsk-Tdsk
Measured at VDD/2 on the CLKOUT
pins of devices
DR1
VT = 14 V
1 Guaranteed by design, not 100% tested in production.
MIN
10
10
2.4
40
-100
TYP MAX UNITS
24
Ω
24
Ω
2.9 5.0 V
0.25 0.4 V
0.8 1.5 ns
1.0 1.5 ns
1.0 ms
50 60 %
250 ps
200 ps
60 100 ps
14 30 ps
250 ps
0 700 ps
0 700 ps
Electrical Characteristics - OUTPUT
TA = 0 - 70C; VDD = VDDL = 3.3 V +/-10%; CL = 20 - 30 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Output Impedance
Output Impedance
Output High Voltage
Output Low Voltage
Rise Time1
Fall Time1
PLL Lock Time1
RDSP
VO = VDD*(0.5)
10
24
Ω
RDSN VO = VDD*(0.5)
10
24
Ω
VOH
IOH = -8 mA
2.4 2.9 5.0 V
VOL
IOL = 8 mA
0.25 0.4 V
Tr
VOL = 0.8 V, VOH = 2.0 V
1.2 2.0 ns
Tf
VOH = 2.0 V, VOL = 0.8 V
1.2 2.0 ns
tLOCK
Stable power supply, valid clock presented on
REF pin
1.0 ms
Duty Cycle1
Dt
VT = 1.4V;Cl=30pF
Dt
VT = Vdd/2; Fout <66.6MHz
Cycle to Cycle jitter1
Tcyc-cyc at 66MHz , Loaded Outputs
Tcyc-cyc >66MHz , Loaded Outputs
Absolute Jitter1
Tjabs 10000 cycles; Cl=30pF
Jitter; 1-Sigma1
Tj1s 10000 cycles; Cl=30pF
Skew1
Tsk
VT = 1.4 V (Window) Output to Output
Device to Device Skew1
Delay Input-Output1
Measured at VDD/2 on the CLKOUT
Tdsk-Tdsk
pins of devices
DR1
VT = 14 V
1 Guaranteed by design, not 100% tested in production.
40
50
60
%
45
50
55
%
250 ps
200 ps
-100 70 100 ps
14
30
ps
250 ps
0 700 ps
0 700 ps
4