ICS853001 Datasheet, PDF (4/16 Pages) Integrated Circuit Systems – 1:1, DIFFERENTIAL LVPECL-TO-2.5V, 3.3V, 5V LVPECL/ECL BUFFER

Integrated
Circuit
Systems, Inc.
ICS853001
1:1, DIFFERENTIAL LVPECL-TO-
2.5V, 3.3V, 5V LVPECL/ECL BUFFER
TABLE 3D. LVPECL DC CHARACTERISTICS, V_CC = 2.375V TO 5.25V; V_EE = 0V, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions Minimum Typical
PCLK
I_IH
Input High Current
nPCLK
V_CC = V_IN
V_CC = V_IN
PCLK
I_IL
Input Low Current
nPCLK
V_CC = 5.25, V_IN = 0V
V_CC = 5.25V, V_IN = 0V
-200
-200
V_PP
Peak-to-Peak Input Voltage
0.15
V_CMR
Common Mode Input Voltage; NOTE 1, 2
1.2
V_OH
Output High Voltage; NOTE 3
V_CC - 1.005
V_OL
Output Low Voltage; NOTE 3
V_CC - 1.78
V_SWING Peak-to-Peak Output Voltage Swing
0.6
V_BB
Bias Voltage
V_CC - 1.44 V_CC - 1.38
NOTE 1: Common mode voltage is defined as V_IH.
NOTE 2: For single ended applications, the maximum input voltage for PCLK, nPCLK is V_CC + 0.3V.
NOTE 3: Outputs terminated with 50Ω to V_CC - 2V.
Maximum
200
200
1.2
V_CC
1.0
V_CC - 1.32
Units
µA
µA
µA
µA
V
V
V
V
V
V
TABLE
4.
AC
CHARACTERISTICS,
V
CC
=
0V;
V
EE
=
-5.25V
TO
-2.375V
OR
V
CC
=
2.375
TO
5.25V;
V
EE
=
0V,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
f_MAX
Output Frequency
t_PD
Propagation Delay; NOTE 1
250
tsk(pp) Part-to-Part Skew; NOTE 2, 3
tjit
Buffer Additive Phase Jitter, RMS; 155.52MHz, Integration Range:
refer to Additive Phase Jitter Section
12KHz - 20MHz
0.03
t /t
RF
Output Rise/Fall Time
20% to 80%
50
V_CC = 2.375V to 3.6V, V_EE = 0
48
odc
Output Duty Cycle
IJ 1GHz _{VCC > 3.6V to 5.25V, VEE = 0 or}
46
V_EE = -5.25V to -3.6V,V_CC = 0
All parameters are measured at IJ 1.7GHz, unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
>2.5
500
100
250
52
54
GHz
ps
ps
ps
ps
%
%
853001AG
www.icst.com/products/hiperclocks.html
4
REV. A JANUARY 29, 2005