ICS91720 Datasheet, PDF (3/11 Pages) Integrated Circuit Systems – Low EMI, Spread Modulating, Clock Generator

ICS91720
Table 1: Frequency Configuration Table
(See I2C Byte 0)
FS4
14in/27out
14in/14out
27in/27out
48in/48out
66in/66out
FS3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FS2 FS1 FS0 Sprd Type Sprd %
0
0
0
0
0.60
0
0
0
1
DOWN
0
0
1
0 _SPREAD
0
0
1
1
(-)
0
1
0
0
0.80
1.00
1.25
1.50
0
1
0
1
2.00
0
1
1
0 CENTER SPD
0.50
0
1
1
1
(+/-)
1.00
1
0
0
0 DOWN
0.60
1
0
0
1 SPREAD
1
0
1
0
(-)
1.00
-0.80
1
0
1
1 CNTR SPD +/-0.3
1
1
0
0
1.50
1
1
0
1 _DOWN
1
1
1
0 _SPREAD
1
1
1
1
(-)
0
0
0
0
1.75
2.00
2.50
3.00
0
0
0
1
-1.25
0
0
1
0
0.40
0
0
1
1 _CENTER
0
1
0
0 _SPREAD
0
1
0
1
(+/-)
0
1
1
0
0.50
0.70
1.00
1.20
0
1
1
1
1.50
1
0
0
0
0.60
1
0
0
1 _DOWN
1
0
1
0 _SPREAD
1
0
1
1
(-)
1
1
0
0
0.80
1.00
1.25
1.50
1
1
0
1
2.00
1
1
1
0 CENTER SPD
0.50
1
1
1
1
(+/-)
1.00
Above is the hard coded 5 bit (32 entry) ROM table.
FS2:0 are ONLY accessible through I2C software programming bits (byte0 bits5:7). FS3 and FS4 can also be
decoded from FS_IN0:1 latched input hardware pins.
FS_IN0 → FS3 and FS_IN1 → FS4. Upon power-up the default is to use hardware selections of FS_IN0:1 latched
values.
FS2 = 0, FS1 = 0, FS0 = 1 upon power-up (refer to the functionality table on page 1).
To access non-default spread entries in the ROM, byte0 programming should be used. In order to change the power
up default of FS_IN1:0 = 10 (-1.25% down spread) to any other spread % entry, first change byte0bit 0 to software
selection by switching this bit to a ‘1’ and then program the desired percentage by changing byte0 bits 7:3.
0698D—10/05/04
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