ICS85322I Datasheet, PDF (3/13 Pages) Integrated Circuit Systems – DUAL LVCMOS / LVTTL-TO-DIFFERENTIAL 2.5V / 3.3V LVPECL TRANSLATOR

Integrated
Circuit
Systems, Inc.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V_CC
Inputs, V_I
Outputs, I_O
Continuous Current
Surge Current
Package Thermal Impedance, θ_JA
Storage Temperature, T
STG
4.6V
-0.5V to V_CC + 0.5 V
50mA
100mA
112.7°C/W (0 lfpm)
-65°C to 150°C
ICS85322I
DUAL LVCMOS / LVTTL-TO-DIFFERENTIAL
2.5V / 3.3V LVPECL TRANSLATOR
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, V_CC = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
V_CC
Positive Supply Voltage
I_EE
Power Supply Current
3.135
Typical
3.3
Maximum
3.465
25
Units
V
mA
TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, V_CC = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
V_IH
Input High Voltage CLK0, CLK1
V_IL
Input Low Voltage CLK0, CLK1
I_IH
Input High Current CLK0, CLK1
V_CC = V_IN = 3.465V
I_IL
Input Low Current CLK0, CLK1
V_CC = V_IN = 3.465V
2
-0.3
-150
Maximum
V_CC + 0.3
1.3
5
Units
V
V
µA
µA
TABLE 3C. LVPECL DC CHARACTERISTICS, V_CC = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions Minimum
V_OH
Output High Voltage; NOTE 1
V_OL
Output Low Voltage; NOTE 1
V_SWING
Peak-to-Peak Output Voltage Swing
NOTE 1: Outputs terminated with 50Ω to V_CC - 2V.
V_CC = V_IN = 3.465V
V_CC = V_IN = 3.465V
V_CC - 1.4
V_CC - 2.0
0.65
Typical
Maximum
V_CC - 1.0
V_CC - 1.7
0.9
Units
V
V
V
TABLE 4A. AC CHARACTERISTICS, V_CC = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
f_MAX
Output Frequency
t_PD
Propagation Delay; NOTE 1
ƒ ≤ 267MHz
0.5
tsk(pp) Part-to-Part Skew; NOTE 2, 3
267
MHz
1.9
ns
250
ps
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80% @ 50MHz
300
40
700
ps
60
%
All parameters measured at 133MHz unless noted otherwise.
NOTE 1: Measured from V_CC/2 point of the input to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
85322AMI
www.icst.com/products/hiperclocks.html
REV. B OCTOBER 7, 2003
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