ICS650-27 Datasheet, PDF (3/6 Pages) Integrated Circuit Systems – Networking Clock Source

ICS650-27
Networking Clock Source
For a 25 MHz fundamental crystal or clock input, the following four tables apply:
A Clocks Select Table (outputs in MHz)
B Clocks Select Table (outputs in MHz)
ASC1
0
0
0
1
1
1
ASC0
0
M
1
0
M
1
CLKA1
100
Test
75
33.3333
Test
66.6667
CLKA2
off (low)
Test
off (low)
16.6667
Test
33.3333
BSC1
0
0
0
1
1
1
BSC0
0
M
1
0
M
1
CLKB1
Test
66.6667
100
83.3333
Test
133.3333
CLKB2
Test
33.3333
50
41.6667
Test
66.6667
C Clocks Select Table (outputs in MHz)
Reference Output Clock Frequency (in MHz)
CCS
0
M
1
CLKC1
125
Test
75
CLKC2
125
Test
75
REFOUT
25
For a 12.5 MHz fundamental crystal or clock input, the following four tables apply:
A Clocks Select Table (outputs in MHz)
B Clocks Select Table (outputs in MHz)
ASC1
0
0
0
1
1
1
ASC0
0
M
1
0
M
1
CLKA1
50
Test
37.5
16.6667
Test
33.3333
CLKA2
off (low)
Test
off (low)
8.3333
Test
16.6667
C Clocks Select Table (outputs in MHz)
BSC1
0
0
0
1
1
1
BSC0
0
M
1
0
M
1
CLKB1
Test
33.3333
50
41.6667
Test
66.6667
CLKB2
Test
16.6667
25
20.8333
Test
33.3333
Reference Output Clock Frequency (in MHz)
CCS
0
M
1
CLKC1
62.5
Test
37.5
CLKC2
62.5
Test
37.5
REFOUT
12.5
0 = connect directly to GND
M = leave unconnected (automatically self biases to VDD/2)
1 = connect directly to VDD
MDS 650-27 D
3
Revision 070505
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