ICS552-01A Datasheet, PDF (3/4 Pages) Integrated Circuit Systems – Crystal Oscillator & Multiplier with 8 Low Skew Outputs

ICS552-01A
Crystal Oscillator & Multiplier with 8 Low Skew Outputs
Electrical Specifications
Parameter
Conditions
ABSOLUTE MAXIMUM RATINGS (note 1)
Minimum
Supply voltage, VDD
Referenced to GND
Inputs and Clock Outputs
Referenced to GND
-0.5
Ambient Operating Temperature
Commercial
0
Industrial
-40
Soldering Temperature
Max of 10 seconds
Storage temperature
-65
DC CHARACTERISTICS (VDD = 3.3 V or 5 V unless noted)
Operating Voltage, VDD
3.0
Input High Voltage, VIH
ICLK
(VDD/2)+1
Input Low Voltage, VIL
ICLK
Input High Voltage, VIH
S3:S0
2
Input Low Voltage, VIL
S3:S0
Output High Voltage, VOH
VDD=3.3V, IOH=-8mA
2.4
Output Low Voltage, VOL
VDD=3.3V, IOL=8mA
Output High Voltage, VOH, VDD = 3.3 or 5 V IOH=-8mA
VDD-0.4
Operating Supply Current, IDD, at 3.3 V
No Load, 25 MHz in, x4
Operating Supply Current, IDD, at 5 V
No Load, 25 MHz in, x4
Power Down Supply Current, IDD, at 3.3 V S3:S0 = 0 (Gnd)
Short Circuit Current, VDD = 3.3 V
Each output
AC CHARACTERISTICS (VDD = 3.3 V or 5 V unless noted)
Input Crystal or Clock Frequency
10
Output Clock Rise Time
0.8 to 2.0 V
Output Clock Fall Time
2.0 to 0.8 V
Output Clock Duty Cycle
At VDD/2
40
Output to Output Skew
Rising edges at VDD/2
Typical
VDD/2
VDD/2
35
59
55
±50
50
Maximum
7
VDD+0.5
70
85
260
150
5.5
(VDD/2)-1
0.8
0.4
27
1.5
1.5
60
250
Units
V
V
°C
°C
°C
°C
V
V
V
V
V
V
V
V
mA
mA
µA
mA
MHz
ns
ns
%
ps
Note: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01 uF should be connected between VDD and GND on pins 4 and 6, and 16 and 14. Other VDDs and
GNDs can be connected to these pins or directly to their respective power planes. A 33 Ω series terminating
resistor may be used on the clock output if the trace is longer than 1-inch.
The crystal should be a fundamental mode (do not use third overtone), parallel resonant, with accuracy as
required by the application. Crystal capacitors should be connected from pins X1 to ground and X2 to
ground. The value of these capacitors is given by the following equation, where C_L is the crystal load
capacitance: Crystal caps (pF) = (C_L-12) x 2. So for a crystal with 18pF load capacitance, two 12pF caps
should be used. For a clock input, connect it to X1/ICLK, and leave X2 unconnected (floating).
MDS 552-01 AB
3
Revision 032200
Printed 11/14/00
Integrated Circuit Systems • 525 Race Street • San Jose • CA • 95126 • [phone]tel • www.icst.com