MK2745-24 Datasheet, PDF (2/4 Pages) Integrated Circuit Systems – DVD/MPEG Clock Source

I CR O C LOC K
MK2745-24
DVD/MPEG Clock Source
Pin Assignment
GND
X2
X1/ICLK
VDD
GND
27M
ACS0
ACLK/8
MK2745-24
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
ACS1
27M
PCLK
VDD
GND
ACLK
PCS
ACLK/256
16 pin (150 mil) SOIC
Audio Clocks Selection Table (in MHz)
ACS1 ACS0
0
0
0
1
1
0
1
1
ACLK
24.576
11.2896
8.192
12.288
ACLK/8
3.072
1.4112
1.024
1.536
ACLK/256
96.0 kHz
44.1 kHz
32.0 kHz
48.0 kHz
Processor Clock (MHz)
PCS
PCLK
0
40
1
60
0 = connect directly to ground
1 = connect directly to VDD
Pin Descriptions
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
GND
X2
X1/ICLK
VDD
GND
27M
ACS0
ACLK/8
ACLK/256
PCS
ACLK
GND
VDD
PCLK
27M
ACS1
Type
P
XO
XI
P
P
O
I
O
O
I
O
P
P
O
O
I
Description
Connect to ground.
Crystal connection. Connect to 27 MHz crystal. Leave unconnected for clock input.
Crystal connection. Connect to 27 MHz crystal or connect to 27 MHz input clock.
Connect to +3.3 V or +5 V. Must be same as other VDD.
Connect to ground.
27.00 MHz clock output.
Audio Clock Select 0. Selects audio clocks per table above.
Audio Clock divided by 8 output. Determined by status of ACS1, ACS0. See table above.
Audio Clock divided by 256 output. Determined by status of ACS1, ACS0. See table above.
Processor Clock Select pin. Selects PCLK per table above.
Audio Clock output. Determined by status of ACS1, ACS0. See table above.
Connect to ground.
Connect to +3.3 V or +5 V. Must be same as other VDD.
Processor Clock output. Determined by status of PCS. See table above.
27.00 MHz clock output.
Audio Clock Select 1. Selects audio clocks per table above.
Key: I = Input, O = output, P = power supply connection
MDS 2745-24 B
2
Revision 100898
Printed 11/16/00
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