MK2704 Datasheet, PDF (2/4 Pages) Integrated Circuit Systems – PLL Audio Clock Synthesizer

PRELIMINARY INFORMATION
MK2704
I C R O C LOC K ^{PLL Audio Clock Synthesizer}
Pin Assignment
MK2704
X1 ¹
VDD ²
8 _X2
7 _S0
GND 3
27M ⁴
6 _S1
5 _CLK
8 pin SOIC
Audio Clock Output Select Table (MHz)
S1
S0
CLK
0
0
36.864
0
1
Test
1
0
16.9344
1
1
18.432
Key: 0 = connect pin directly to ground
1 = connect pin directly to VDD
Pin Descriptions
Number
1
2
3
4
5
6
7
8
Name
X1
VDD
GND
27M
CLK
S1
S0
X2
Type Description
XI Crystal Connection. Connect to a 27.0 MHz fundamental crystal or clock.
P Connect to +3.3V or +5V.
P Connect to ground.
O 27.00 MHz buffered reference clock output.
O Audio Clock Output per table above.
I(PU) Audio Clock Frequency Select Input #1. Determines CLK output per table above.
I(PU) Audio Clock Frequency Select Input #0. Determines CLK output per table above.
XO Crystal Connection to a 27.0 MHz crystal, or leave unconnected for clock input.
Key: XI, XO = Crystal connections; I(PU) = Input with internal pull-up resistor; O = output;
P = power supply connection
MDS 2704 A
2
Revision 062700
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