ICS9169C-232 Datasheet, PDF (2/8 Pages) Integrated Circuit Systems – Frequency Generator for Pentium™ Based Systems

ICS169C-232
Pin Descriptions
PIN NUMBER
1
PIN NAME
VDD1
2
X1
3
4,11,16,22
6,7,9,10,15
5,12,13
5,12,13
X2
GND
CPU(2,3,4,5,8)
CPU1, CPU6,
CPU7
FS (0:2)
8
VDD2
14
VDD3
17,18,20,21,23, 24
19
25
26
27
28
BUS(1:6)
VDD4
VDD5
24 MHz
48 MHz
REF
BSEL
TYPE
PWR
IN
OUT
PWR
OUT
OUT
IN
PWR
PWR
OUT
PWR
PWR
OUT
OUT
OUT
IN
DESCRIPTION
Power for control logic and crystal oscillator circuit and
14.318 M Hz output
XTAL or external reference frequency input. This input includes XTAL
load capacitance and feedback bias for a 12-16MHz crystal, nominally
14.31818M Hz. External crystal load of 30pF to GND recommended for
VDD power on faster than 2.0ms.
XTAL output which includes XTAL load capacitance. External crystal
load of 10pF to GND recommended for VDD power on faster than 2.0ms.
Ground for control logic.
Processor clock outputs which are a multiple of the input reference clock
as shown in the preceding table.
Processor clock outputs which are a multiple of the input reference clock
as shown in the preceding table.
Frequency multiplier select pins. See shared pin programming description
later in this data sheet for further explanation. 350K* internal pull up.
Power for CPU (1:6) clock buffers only. This VDD supply can be reduced
to 2.5V for CPU (1:6) outputs.
Power for CPU (7:8) clock buffers and internal PLL and Core logic. Must
be nominal 3.3V (3.0 to 3.7V)
BUS clock outputs which are a multiple of the input reference clock as
shown in the preceding table.
Power for BUS clock buffers BUS (1;6)
Power for fixed clock buffer (48 MHz, 24 MHz)
Fixed 24 MHz clock (assuming a 14.31818 MHz REF frequency).
Fixed 48 MHz clock (assuming a 14.31818 MHz REF frequency).
Fixed 14.31818 M Hz clock (assuming a 14.31818 MHz REF frequency).
Selection for synchronous or asynchronous bus clock operation. 350K*
internal pull up.
* The internal pull up will vary from 350K to 500K based on temperature
2